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    <title>topic Re: Understanding 8M Mini EVK JTAG Debug Port in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Understanding-8M-Mini-EVK-JTAG-Debug-Port/m-p/932189#M139798</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks, that helps me understand this much better!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 01 Oct 2019 16:44:42 GMT</pubDate>
    <dc:creator>adevries</dc:creator>
    <dc:date>2019-10-01T16:44:42Z</dc:date>
    <item>
      <title>Understanding 8M Mini EVK JTAG Debug Port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Understanding-8M-Mini-EVK-JTAG-Debug-Port/m-p/932187#M139796</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've been reading about the JTAG debug capabilities of the 8M Mini, and I had some questions about the JTAG Debug port on the 8M Mini EVK. Please see a schematic image below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/82813i33261626F4301BDB/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here are my questions:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Was this pin header designed to interface with any specific JTAG controller? Or was it just chosen randomly as a way for these signals to come out to pins?&lt;/P&gt;&lt;P&gt;2. Why is POR_B connected to one of these pins? I thought that JTAG only needed TMS, TCK, TDO, and TDI (with nTRST optional)? Does connecting to POR_B offer some kind of easier or additional control?&lt;/P&gt;&lt;P&gt;3. Why is JTAG_nTRST not connected to the JTAG Debug interface? Does the processor use this signal in debug or boundary scan mode?&amp;nbsp;&lt;/P&gt;&lt;P&gt;4. Is VDD_1V8 connected to pin 1 through a 100ohm resistor to allow a JTAG controller to sense the target voltage? Or is connected there for another purpose?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 30 Sep 2019 19:22:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Understanding-8M-Mini-EVK-JTAG-Debug-Port/m-p/932187#M139796</guid>
      <dc:creator>adevries</dc:creator>
      <dc:date>2019-09-30T19:22:31Z</dc:date>
    </item>
    <item>
      <title>Re: Understanding 8M Mini EVK JTAG Debug Port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Understanding-8M-Mini-EVK-JTAG-Debug-Port/m-p/932188#M139797</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please look at my comments below.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; According to section 2.14 [JTAG connector (J902)] of the EVK Board Hardware User's Guide:&lt;BR /&gt; The i.MX 8M Mini applications processor has five JATG signals on the dedicated pins and one hardware &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;reset input signal (POR_B). Those signals are directly connected to the 10-pin 1.27-mm JTAG connector &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;J902. The five JTAG signals used by the processor are:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;• JTAG_TCK—TAP clock&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;• JTAG_TMS—TAP machine state&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;• JTAG_TDI—TAP data in&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;• JTAG_TDO—TAP data out&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;• JTAG_nTRST—TAP reset request (active low)&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX8MMEVKHUG"&gt;https://www.nxp.com/webapp/Download?colCode=IMX8MMEVKHUG&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; The JTAG connector is based on standard ARM 10 pins Cortex Debug Connector. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A href="http://infocenter.arm.com/help/topic/com.arm.doc.faqs/attached/13634/cortex_debug_connectors.pdf"&gt;http://infocenter.arm.com/help/topic/com.arm.doc.faqs/attached/13634/cortex_debug_connectors.pdf&lt;/A&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A href="http://www2.keil.com/coresight/coresight-connectors/"&gt;http://www2.keil.com/coresight/coresight-connectors/&lt;/A&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; The i.MX8Mm POR allows to fully reset i.MX8Mm if needed.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;3.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; JTAG_nTRST signal is part of JTAG interface and can be used for Boundary Scan.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;4.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Correct - VDD_1V8, connected to pin 1 through a 100ohm resistor allows a JTAG &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;controller to sense the target voltage.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Have a great day,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Yuri.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;-------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Note:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Oct 2019 06:24:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Understanding-8M-Mini-EVK-JTAG-Debug-Port/m-p/932188#M139797</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2019-10-01T06:24:43Z</dc:date>
    </item>
    <item>
      <title>Re: Understanding 8M Mini EVK JTAG Debug Port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Understanding-8M-Mini-EVK-JTAG-Debug-Port/m-p/932189#M139798</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks, that helps me understand this much better!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Oct 2019 16:44:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Understanding-8M-Mini-EVK-JTAG-Debug-Port/m-p/932189#M139798</guid>
      <dc:creator>adevries</dc:creator>
      <dc:date>2019-10-01T16:44:42Z</dc:date>
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