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    <title>i.MX ProcessorsのトピックRe: /dev/mxc_ipu in IMX6Q</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/dev-mxc-ipu-in-IMX6Q/m-p/923527#M138799</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi joan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;seems this depends on registration order, most probably first ipu1 then ipu2,&lt;/P&gt;&lt;P&gt;for details one can look on&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.oreilly.com/library/view/understanding-linux-network/0596002556/ch08.html" title="https://www.oreilly.com/library/view/understanding-linux-network/0596002556/ch08.html"&gt;8. Device Registration and Initialization - Understanding Linux Network…&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 16 Oct 2019 23:33:50 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2019-10-16T23:33:50Z</dc:date>
    <item>
      <title>/dev/mxc_ipu in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dev-mxc-ipu-in-IMX6Q/m-p/923526#M138798</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have a question regarding the IPU in IMX6 processors: When accessing the IPU via the "/dev/mxc_ipu" kernel device, in case the processor has two IPUs (e.g the IMX6Q or IMX6QP) which IPU is concretely used? I don't see in the ipu_device.c code how a concrete IPU is selected.&lt;/P&gt;&lt;P&gt;Thanks for the help.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Oct 2019 08:08:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dev-mxc-ipu-in-IMX6Q/m-p/923526#M138798</guid>
      <dc:creator>joanvicient</dc:creator>
      <dc:date>2019-10-16T08:08:13Z</dc:date>
    </item>
    <item>
      <title>Re: /dev/mxc_ipu in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dev-mxc-ipu-in-IMX6Q/m-p/923527#M138799</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi joan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;seems this depends on registration order, most probably first ipu1 then ipu2,&lt;/P&gt;&lt;P&gt;for details one can look on&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.oreilly.com/library/view/understanding-linux-network/0596002556/ch08.html" title="https://www.oreilly.com/library/view/understanding-linux-network/0596002556/ch08.html"&gt;8. Device Registration and Initialization - Understanding Linux Network…&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Oct 2019 23:33:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dev-mxc-ipu-in-IMX6Q/m-p/923527#M138799</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-10-16T23:33:50Z</dc:date>
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