topic i.mx6 lvds abnormal in i.MX Processors

i.mx6 lvds abnormal

janexu — Mon, 15 Jul 2019 07:54:10 GMT

Hi,

We use i.mx6 core board and we found the lcd display will sometimes abnormal when we reboot the core board. We checked the lvds clk signal and found the lvds clock signal no output when display abnormal.

We found a document from NXP website. EB821. After checked the document, we think it is most like the problem we met. But after we checked the software and found we already had this patch in the Linux kennel. and we still have this problem..

The problem happened when system just enter Linux. Normally lvds will output correct signal and display will normal too. When issue happed, lvds will no output and display will abnormal.

Can you help on this? Thanks.

Best Regards,

Jane Xu

Re: i.mx6 lvds abnormal

igorpadykov — Mon, 15 Jul 2019 10:47:37 GMT

Hi Jane

if patches are already integrated, reason may be that all board power is

not shortly removed as it is done in i.MX6Q Sabre SD schematic spf-27392 p.21

(U507, pmic pwron). Without such solution there may be various issues during reboot.

iMX6Q-SABRE-SDB-DESIGNFILES

Design files, including hardware schematics, Gerbers, and OrCAD files for i.MX 6Quad (i.MX 6Dual emulation)

Best regards
igor
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Re: i.mx6 lvds abnormal

janexu — Tue, 16 Jul 2019 02:23:37 GMT

Hi Igor,

Thanks. I checked the core board design, the RESET signal didn't connect to PMIC reset but connected to i.mx6 reset. so we didn't implement this solution.

We found if we press RESET signal 5s and then reboot. The issue will not happen, do you know why?

As the core board was purchased from other supplier, we cannot change it and also we don't have enough time to change a new core board. so We plan to add a instruction in the user manual and tell the customer how to fix issue. We want to make sure if press RESET signal 5s can solve this issue.

Thanks.

Best Regards,

Jane Xu

Re: i.mx6 lvds abnormal

igorpadykov — Tue, 16 Jul 2019 05:29:22 GMT

Hi Jane

>We found if we press RESET signal 5s and then reboot. The issue will not happen, do you know why?

probably before boot, power supplies had not fully discharged as it should be

according to power-up sequence.

Best regards
igor

Re: i.mx6 lvds abnormal

janexu — Mon, 22 Jul 2019 06:16:13 GMT

Hi Igor,

Do you have more information about the RESET signal that describe why it need to connect to PMIC pwron signal?

Best Regards,

Jane Xu