About interrupt

goto11 — Mon, 12 Aug 2019 14:36:38 GMT

Hello,community

About the following three questions

About IRQ56 to IRQ63 in Table 7-1 of i.MX 7Dual Applications Processor Reference ManualI want to know the register names for enabling / disabling INT7 to INT0?

GPIO1 Combined interrupt indication for GPIO1 signal 0 throughout 15

Does an interrupt occur if any valid interrupt condition from signal0 to signal15 is met?

Does the combined interrupt indication also occur under the interrupt condition from INT7 to INT0?

Best Regards,
Goto

Re: About interrupt

igorpadykov — Mon, 12 Aug 2019 23:14:02 GMT

Hi Goto

for enabling / disabling gpio interrupts one can check GPIOx_ICR,

GPIOx_IMR registers described in sect.8.3 General Purpose Input/Output (GPIO)

i.MX 7Dual Applications Processor Reference Manual

>Does an interrupt occur if any valid interrupt condition from signal0 to signal15 is met?

yes

>Does the combined interrupt indication also occur under the interrupt condition from INT7 to INT0?

for example "Combined interrupt indication for GPIO1 signal 0 throughout 15" - if any of GPIO1(0)

through GPIO1(15) has enabled interrupt.

"Active HIGH Interrupt from INT7 from GPIO" only if GPIO1(7) interrupt is enabled.

Best regards
igor
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i.MX ProcessorsのトピックAbout interrupt

About interrupt

Re: About interrupt