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    <title>i.MX ProcessorsのトピックRe: sc16is752 exception</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913767#M137590</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi igor,&lt;/P&gt;&lt;P&gt;Excuse me, may be I'd find the reason.&lt;/P&gt;&lt;P&gt;SC16IS752 has two address pin, but there are 16 address. "Table 32. SC16IS752/SC16IS762 address map" in the datasheet finger out A0/A1 could be connected to Vdd, Vss, SCL or SDA. so, there are (2 ^ 4 = )16 address. In our use case, "A1-&amp;gt;Vdd A0-&amp;gt;SCL" and "&lt;SPAN&gt;A1-&amp;gt;Vdd A0-&amp;gt;SDA&lt;/SPAN&gt;" dosen't work! After taking down the two chips, is ok!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 19 Jun 2019 09:06:45 GMT</pubDate>
    <dc:creator>liuyongzhao027</dc:creator>
    <dc:date>2019-06-19T09:06:45Z</dc:date>
    <item>
      <title>sc16is752 exception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913762#M137585</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;Hi:&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp; I want to expand some uart ports with sc16is752 based on embeded linux OS. There are 6 sc16is752 chips on iic bus at 100k/s clock rate. When testing, some exception appeared.&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp; Testing conditions:&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;a. baud rate 9600&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;b. 512B per second&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;c. dual full duplex, loopback， self-transmitting and self-receiving.&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp; Sometimes, maybe only two chips work. other chips could send data, but no recieving. At Last Day, maybe ABC are ok, DEF can not work; And Second Day, maybe DEF are ok.&amp;nbsp;&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp; Sometimes, one chip's interruption pin generate interruption frequently, so that, the linux kernel halted.&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/DIV&gt;&lt;DIV style="color: #000000; font-size: 14px;"&gt;&amp;nbsp; &amp;nbsp; So, How many sc16is752 could be used at most on iic bus at the same time? What make the chips unstable?&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 May 2019 01:34:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913762#M137585</guid>
      <dc:creator>liuyongzhao027</dc:creator>
      <dc:date>2019-05-28T01:34:36Z</dc:date>
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    <item>
      <title>Re: sc16is752 exception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913763#M137586</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi jo&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can set 2-3 sc16is752 on one i2c line and check if this helps.&lt;/P&gt;&lt;P&gt;Probably there is instability due to timeouts caused by i2c bus contentions.&lt;/P&gt;&lt;P&gt;Also one can check hardware running baremetal tests&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/463569"&gt;https://community.nxp.com/thread/463569&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 May 2019 08:02:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913763#M137586</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-05-28T08:02:46Z</dc:date>
    </item>
    <item>
      <title>Re: sc16is752 exception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913764#M137587</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi igor,&lt;/P&gt;&lt;P&gt;Thanks for your reply!&lt;/P&gt;&lt;P&gt;I'd tryed lots of tests, most are stress testing. I want to know if or not many chips be pluged on i2c bus that make i2c bus electrical characteristic worst.&lt;/P&gt;&lt;P&gt;In the future, I will poll the ports time sharing, and may there is lest data. I wrroy about there are too many chips makes the timeout or other errors.&lt;/P&gt;&lt;P&gt;em, at lest, the os won't halted by frequent interruptions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a greate day&lt;/P&gt;&lt;P&gt;jo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 May 2019 08:54:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913764#M137587</guid>
      <dc:creator>liuyongzhao027</dc:creator>
      <dc:date>2019-05-28T08:54:27Z</dc:date>
    </item>
    <item>
      <title>Re: sc16is752 exception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913765#M137588</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi jo&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can try to avoid frequent interrupts adding software delays&lt;/P&gt;&lt;P&gt;between accesses to sc16is752.&lt;/P&gt;&lt;P&gt;Also pay attention to lock-up problems described on below link&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/316813"&gt;I2C reset&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 May 2019 10:25:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913765#M137588</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-05-28T10:25:33Z</dc:date>
    </item>
    <item>
      <title>Re: sc16is752 exception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913766#M137589</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi igor,&lt;/P&gt;&lt;P&gt;Thank you!&lt;/P&gt;&lt;P&gt;Is usefull for me that link. and i think there is the "I2C lock up" problem just some minutes ago. I2C SCL line is LOW and SDA is HIGH. What i can do is poweroff.&lt;/P&gt;&lt;P&gt;I will try it adding software delays and roll polling&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;sc16is752.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Thanks for your help!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;jo&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 May 2019 02:49:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913766#M137589</guid>
      <dc:creator>liuyongzhao027</dc:creator>
      <dc:date>2019-05-29T02:49:04Z</dc:date>
    </item>
    <item>
      <title>Re: sc16is752 exception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913767#M137590</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi igor,&lt;/P&gt;&lt;P&gt;Excuse me, may be I'd find the reason.&lt;/P&gt;&lt;P&gt;SC16IS752 has two address pin, but there are 16 address. "Table 32. SC16IS752/SC16IS762 address map" in the datasheet finger out A0/A1 could be connected to Vdd, Vss, SCL or SDA. so, there are (2 ^ 4 = )16 address. In our use case, "A1-&amp;gt;Vdd A0-&amp;gt;SCL" and "&lt;SPAN&gt;A1-&amp;gt;Vdd A0-&amp;gt;SDA&lt;/SPAN&gt;" dosen't work! After taking down the two chips, is ok!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Jun 2019 09:06:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/sc16is752-exception/m-p/913767#M137590</guid>
      <dc:creator>liuyongzhao027</dc:creator>
      <dc:date>2019-06-19T09:06:45Z</dc:date>
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