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    <title>i.MX ProcessorsのトピックRe: i.mx6sl no-boot</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911541#M137376</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; As we can see on the oscilloscope waveforms some portion of boot data&lt;/P&gt;&lt;P&gt;is loaded&amp;nbsp; to DRAM, which should be preliminary initialized, using the DCD.&lt;/P&gt;&lt;P&gt;If memory is not initialized correctly, boot issues can take place.&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 13 Aug 2019 03:30:16 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2019-08-13T03:30:16Z</dc:date>
    <item>
      <title>i.mx6sl no-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911538#M137373</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;We are running with the following, but u-boot is not possible&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;Booting with micro SD card in SD1 slot&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;CPU：&lt;SPAN style="color: #660000;"&gt;MCIMX6L3DVN10AC&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #660000;"&gt;DDR3L：MT41K256M16TW-107:P&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;The following shows the waveforms of POR_B, SD_CLK, and POR_B&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="scope_36.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/86768i60A1FFEB8C20AF66/image-size/large?v=v2&amp;amp;px=999" role="button" title="scope_36.png" alt="scope_36.png" /&gt;&lt;/span&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;Since U-BOOT is not possible, there is no UART output and DDR stress test is not possible&lt;SPAN&gt;&lt;SPAN title=""&gt;.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN title=""&gt;Please tell me the reason why U-BOOT cannot be started and the countermeasures.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 10 Aug 2019 11:12:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911538#M137373</guid>
      <dc:creator>onoyh</dc:creator>
      <dc:date>2019-08-10T11:12:21Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6sl no-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911539#M137374</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please check memory initialization in U-boot.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Information about it may be found in U-boot porting chapter of "i.MX_BSP_Porting_Guide.pdf".&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;The following resource may be helpful:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A href="https://community.nxp.com/docs/DOC-105967"&gt;i.MX6SL DDR3 Register Programming Aid&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Also, try to run the DDR Stress test (JTAG or USB downloader based versions).&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A href="https://community.nxp.com/docs/DOC-105652"&gt;https://community.nxp.com/docs/DOC-105652&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Have a great day,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Yuri&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;-------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Note:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Aug 2019 04:27:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911539#M137374</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2019-08-12T04:27:54Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6sl no-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911540#M137375</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,Yuri&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;Thank you for answering&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;i.MX6SL DDR3 Register Programming Aid has already been applied and i.MX6 / 7 DDR Stress Test Tool V3.00 is also completed.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;Could the cause be the u-boot initialization setting?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;Thanks&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Aug 2019 23:35:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911540#M137375</guid>
      <dc:creator>onoyh</dc:creator>
      <dc:date>2019-08-12T23:35:30Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6sl no-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911541#M137376</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; As we can see on the oscilloscope waveforms some portion of boot data&lt;/P&gt;&lt;P&gt;is loaded&amp;nbsp; to DRAM, which should be preliminary initialized, using the DCD.&lt;/P&gt;&lt;P&gt;If memory is not initialized correctly, boot issues can take place.&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Aug 2019 03:30:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911541#M137376</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2019-08-13T03:30:16Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6sl no-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911542#M137377</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,Yuri&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for answering&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;Is there a difference in the DCD value even though the USB DDR stress test has passed?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;Since the DDR stress test has passed, we recognize that there is a cause between SD and i.mx.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;Is there any way to isolate hardware or software?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN lang="en"&gt;&lt;SPAN title=""&gt;Thanks&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Aug 2019 10:51:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911542#M137377</guid>
      <dc:creator>onoyh</dc:creator>
      <dc:date>2019-08-13T10:51:58Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6sl no-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911543#M137378</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;Yes, some differences may take place, therefore, at least check the U-boot DCD.&lt;/P&gt;&lt;P&gt;Use&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;U-boot porting chapter of "i.MX_BSP_Porting_Guide.pdf".&lt;/SPAN&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Aug 2019 03:16:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6sl-no-boot/m-p/911543#M137378</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2019-08-14T03:16:10Z</dc:date>
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