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    <title>i.MX ProcessorsのトピックRe: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909979#M137083</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;On enabling&amp;nbsp;MIPI_CSIS_ISPCFG_DOUBLE_CMPNT (1 &amp;lt;&amp;lt; 12) as per your patch,&amp;nbsp;base address switching Change Err occurs. (BIT_ADDR_CH_ERR_INT)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 22 Jul 2019 10:43:14 GMT</pubDate>
    <dc:creator>ashwanthselvam</dc:creator>
    <dc:date>2019-07-22T10:43:14Z</dc:date>
    <item>
      <title>MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909974#M137078</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;MIPI Camera frame corruption occurs in IMX8MM&amp;nbsp;when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18 (CSI Control Register 18).&lt;/P&gt;&lt;P&gt;The same works in IMX8M.&lt;/P&gt;&lt;P&gt;I know that the MIPI CSI drivers are different for IMX8M and IMX8MM. Is there something that has to be done in addition, in MIPI CSI driver of IMX8MM to mimic the same behaviour as IMX8M? &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/gogoer"&gt;gogoer&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 12 Jul 2019 10:10:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909974#M137078</guid>
      <dc:creator>ashwanthselvam</dc:creator>
      <dc:date>2019-07-12T10:10:37Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909975#M137079</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Selvam:&lt;/P&gt;&lt;P&gt;I'm not sure soc validation team verified those bits, please specify your test environment.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/91156i09199B107A7A898F/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 14 Jul 2019 06:54:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909975#M137079</guid>
      <dc:creator>haidong_zheng</dc:creator>
      <dc:date>2019-07-14T06:54:11Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909976#M137080</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am testing with a 4 lane AR1335 MIPI Camera. The data format of the sensor is UYVY. Since the waylandsink of Gstreamer supports YUYV, I need to swap the bits to avoid using a videoconverter. Since using a videoconverter means a drop in framerate.&amp;nbsp; By enabling the MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP, I was able to stream using wayland sink in IMX8M, but when I tried the same in IMX8MM, frame corruption happens.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Jul 2019 06:51:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909976#M137080</guid>
      <dc:creator>ashwanthselvam</dc:creator>
      <dc:date>2019-07-17T06:51:13Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909977#M137081</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ashwanth:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any way I will sync this issue internally.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Before get result please try below patch for you issue.&amp;nbsp; This patch is based on 4.14.98 GA 2.0&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE class="language-c line-numbers"&gt;&lt;CODE&gt;diff &lt;SPAN class="operator token"&gt;--&lt;/SPAN&gt;git a&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;drivers&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;media&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;platform&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;mxc&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;capture&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;mxc_mipi_csi&lt;SPAN class="punctuation token"&gt;.&lt;/SPAN&gt;c b&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;drivers&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;media&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;platform&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;mxc&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;capture&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;mxc_mipi_csi&lt;SPAN class="punctuation token"&gt;.&lt;/SPAN&gt;c
index a7964b7b8345&lt;SPAN class="punctuation token"&gt;.&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;.&lt;/SPAN&gt;5b4fec5dd9b3 &lt;SPAN class="number token"&gt;100644&lt;/SPAN&gt;
&lt;SPAN class="operator token"&gt;--&lt;/SPAN&gt;&lt;SPAN class="operator token"&gt;-&lt;/SPAN&gt; a&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;drivers&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;media&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;platform&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;mxc&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;capture&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;mxc_mipi_csi&lt;SPAN class="punctuation token"&gt;.&lt;/SPAN&gt;c
&lt;SPAN class="operator token"&gt;++&lt;/SPAN&gt;&lt;SPAN class="operator token"&gt;+&lt;/SPAN&gt; b&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;drivers&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;media&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;platform&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;mxc&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;capture&lt;SPAN class="operator token"&gt;/&lt;/SPAN&gt;mxc_mipi_csi&lt;SPAN class="punctuation token"&gt;.&lt;/SPAN&gt;c
@@ &lt;SPAN class="operator token"&gt;-&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;488&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;6&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;+&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;488&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;8&lt;/SPAN&gt; @@ &lt;SPAN class="keyword token"&gt;static&lt;/SPAN&gt; &lt;SPAN class="keyword token"&gt;void&lt;/SPAN&gt; &lt;SPAN class="token function"&gt;__mipi_csis_set_format&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;&lt;SPAN class="keyword token"&gt;struct&lt;/SPAN&gt; csi_state &lt;SPAN class="operator token"&gt;*&lt;/SPAN&gt;state&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;
 val &lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; &lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;val &lt;SPAN class="operator token"&gt;&amp;amp;&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;~&lt;/SPAN&gt;MIPI_CSIS_ISPCFG_FMT_MASK&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;|&lt;/SPAN&gt; state&lt;SPAN class="operator token"&gt;-&amp;gt;&lt;/SPAN&gt;csis_fmt&lt;SPAN class="operator token"&gt;-&amp;gt;&lt;/SPAN&gt;fmt_reg&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
 &lt;SPAN class="token function"&gt;mipi_csis_write&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;state&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; MIPI_CSIS_ISPCONFIG_CH0&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; val&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
&lt;SPAN class="operator token"&gt;+&lt;/SPAN&gt; &lt;SPAN class="token function"&gt;pr_info&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;&lt;SPAN class="string token"&gt;"fmt: %#x, %d x %d; CONFIG:0x%x \n"&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; mf&lt;SPAN class="operator token"&gt;-&amp;gt;&lt;/SPAN&gt;code&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; mf&lt;SPAN class="operator token"&gt;-&amp;gt;&lt;/SPAN&gt;width&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; mf&lt;SPAN class="operator token"&gt;-&amp;gt;&lt;/SPAN&gt;height&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; val&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
&lt;SPAN class="operator token"&gt;+&lt;/SPAN&gt;
 &lt;SPAN class="comment token"&gt;/* Pixel resolution */&lt;/SPAN&gt;
 val &lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; mf&lt;SPAN class="operator token"&gt;-&amp;gt;&lt;/SPAN&gt;width &lt;SPAN class="operator token"&gt;|&lt;/SPAN&gt; &lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;mf&lt;SPAN class="operator token"&gt;-&amp;gt;&lt;/SPAN&gt;height &lt;SPAN class="operator token"&gt;&amp;lt;&amp;lt;&lt;/SPAN&gt; &lt;SPAN class="number token"&gt;16&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
 &lt;SPAN class="token function"&gt;mipi_csis_write&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;state&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; MIPI_CSIS_ISPRESOL_CH0&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; val&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
@@ &lt;SPAN class="operator token"&gt;-&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;522&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;8&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;+&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;524&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;11&lt;/SPAN&gt; @@ &lt;SPAN class="keyword token"&gt;static&lt;/SPAN&gt; &lt;SPAN class="keyword token"&gt;void&lt;/SPAN&gt; &lt;SPAN class="token function"&gt;mipi_csis_set_params&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;&lt;SPAN class="keyword token"&gt;struct&lt;/SPAN&gt; csi_state &lt;SPAN class="operator token"&gt;*&lt;/SPAN&gt;state&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;
 val &lt;SPAN class="operator token"&gt;|&lt;/SPAN&gt;&lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; MIPI_CSIS_ISPCFG_ALIGN_32BIT&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
 &lt;SPAN class="keyword token"&gt;else&lt;/SPAN&gt; &lt;SPAN class="comment token"&gt;/* Normal output */&lt;/SPAN&gt;
 val &lt;SPAN class="operator token"&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;~&lt;/SPAN&gt;MIPI_CSIS_ISPCFG_ALIGN_32BIT&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
&lt;SPAN class="operator token"&gt;+&lt;/SPAN&gt; val &lt;SPAN class="operator token"&gt;|&lt;/SPAN&gt;&lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; &lt;SPAN class="number token"&gt;1&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;&amp;lt;&amp;lt;&lt;/SPAN&gt; &lt;SPAN class="number token"&gt;12&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
 &lt;SPAN class="token function"&gt;mipi_csis_write&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;state&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; MIPI_CSIS_ISPCONFIG_CH0&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; val&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
&lt;SPAN class="operator token"&gt;+&lt;/SPAN&gt; &lt;SPAN class="token function"&gt;pr_info&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;&lt;SPAN class="string token"&gt;" mipi_csis_set_params CONFIG:0x%x\n"&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; val&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
&lt;SPAN class="operator token"&gt;+&lt;/SPAN&gt;
 val &lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; &lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;0&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;&amp;lt;&amp;lt;&lt;/SPAN&gt; MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;|&lt;/SPAN&gt;
 &lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;0&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;&amp;lt;&amp;lt;&lt;/SPAN&gt; MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;|&lt;/SPAN&gt;
 &lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;&lt;SPAN class="number token"&gt;0&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;&amp;lt;&amp;lt;&lt;/SPAN&gt; MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Jul 2019 00:55:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909977#M137081</guid>
      <dc:creator>haidong_zheng</dc:creator>
      <dc:date>2019-07-18T00:55:01Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909978#M137082</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ashwanth:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have you tried my patch ? what is the result ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards .&lt;/P&gt;&lt;P&gt;Tom.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tom.Zheng(郑海东)&lt;/P&gt;&lt;P&gt;System Engineering.&lt;/P&gt;&lt;P&gt;Microcontroller Group. NXP Semiconductors&lt;/P&gt;&lt;P&gt;Address: No 192, LiangJing Road, Pudong New District, Shanghai, China&lt;/P&gt;&lt;P&gt;Phone: 86 21 28937181&lt;/P&gt;&lt;P&gt;Postcode 201203&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 01:14:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909978#M137082</guid>
      <dc:creator>haidong_zheng</dc:creator>
      <dc:date>2019-07-22T01:14:36Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909979#M137083</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;On enabling&amp;nbsp;MIPI_CSIS_ISPCFG_DOUBLE_CMPNT (1 &amp;lt;&amp;lt; 12) as per your patch,&amp;nbsp;base address switching Change Err occurs. (BIT_ADDR_CH_ERR_INT)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 10:43:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909979#M137083</guid>
      <dc:creator>ashwanthselvam</dc:creator>
      <dc:date>2019-07-22T10:43:14Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909980#M137084</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;MIPI_CSIS_ISPCFG_DOUBLE_CMPNT (1 &amp;lt;&amp;lt; 12) ?&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;My patch is not enable this bit. This patch set pixel mode as 01.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/82360iB1AB4CE453FF5FCC/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 12:23:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909980#M137084</guid>
      <dc:creator>haidong_zheng</dc:creator>
      <dc:date>2019-07-22T12:23:53Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909981#M137085</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes,&lt;/P&gt;&lt;P&gt;Setting Dual pixel mode causes base address switching error&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 12:27:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909981#M137085</guid>
      <dc:creator>ashwanthselvam</dc:creator>
      <dc:date>2019-07-22T12:27:21Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909982#M137086</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Understood.  But internal team still suggest configure this field.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards .&lt;/P&gt;&lt;P&gt;Tom.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tom.Zheng(郑海东)&lt;/P&gt;&lt;P&gt;System Engineering.&lt;/P&gt;&lt;P&gt;Microcontroller Group. NXP Semiconductors&lt;/P&gt;&lt;P&gt;Address: No 192, LiangJing Road, Pudong New District, Shanghai, China&lt;/P&gt;&lt;P&gt;Phone: 86 21 28937181&lt;/P&gt;&lt;P&gt;Postcode 201203&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 13:00:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909982#M137086</guid>
      <dc:creator>haidong_zheng</dc:creator>
      <dc:date>2019-07-22T13:00:21Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909983#M137087</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Setting Dual pixel mode causes base address switching error(&lt;SPAN&gt;BIT_ADDR_CH_ERR_INT)&lt;/SPAN&gt;. Is there any workaround for this?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 13:18:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909983#M137087</guid>
      <dc:creator>ashwanthselvam</dc:creator>
      <dc:date>2019-07-22T13:18:30Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909984#M137088</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ashwanth:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So far we did not have good way to solve your issue,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But designer has below suggestion:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1: confirm camera sensor output double component data:&lt;/P&gt;&lt;P&gt;2: confirm CR18 BIT20/BIT21 MIPI_YU_SWAP/MIPI_DOUBLE_CMPNT be set&lt;/P&gt;&lt;P&gt;3: confirm bit 12/13 of MIPI_CSI_ISP_CONFIG0 PIXEL_MODE is 1&amp;nbsp;&lt;/P&gt;&lt;P&gt;4: Try set /clear CR18 BIT4/BIT5 BASEADDR_SWITCH_EN &amp;amp; BASEADDR_SWITCH_SEL&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jul 2019 00:59:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909984#M137088</guid>
      <dc:creator>haidong_zheng</dc:creator>
      <dc:date>2019-07-23T00:59:06Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI Camera Frame corruption in IMX8MM when MIPI_DOUBLE_CMPNT and MIPI_YU_SWAP is enabled in CSI_CSICR18</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909985#M137089</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Tried your suggestion but no luck. The issue still exists.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Jul 2019 10:27:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-Camera-Frame-corruption-in-IMX8MM-when-MIPI-DOUBLE-CMPNT/m-p/909985#M137089</guid>
      <dc:creator>ashwanthselvam</dc:creator>
      <dc:date>2019-07-24T10:27:36Z</dc:date>
    </item>
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