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    <title>topic Re: Question about  RPMsg in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907548#M136813</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately, the i.MX8QX is still on preproduction and we do not have any official information available for the moment. I apologize for the inconveniences this could give you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 30 Apr 2019 21:06:26 GMT</pubDate>
    <dc:creator>diegoadrian</dc:creator>
    <dc:date>2019-04-30T21:06:26Z</dc:date>
    <item>
      <title>Question about  RPMsg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907545#M136810</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello，&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I want to ask that A core communicate with M4 core use RPMsg SW side,and for HW side is it used MU in M4 or MU&lt;/P&gt;&lt;P&gt;in A core LSIO or both used in M4 and A core?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Apr 2019 10:20:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907545#M136810</guid>
      <dc:creator>xu_ji1</dc:creator>
      <dc:date>2019-04-24T10:20:00Z</dc:date>
    </item>
    <item>
      <title>Re: Question about  RPMsg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907546#M136811</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In which i.MX chip are you working?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Apr 2019 16:31:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907546#M136811</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-04-24T16:31:03Z</dc:date>
    </item>
    <item>
      <title>Re: Question about  RPMsg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907547#M136812</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello，&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The chip is I.MX8QXP which I used.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Apr 2019 01:09:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907547#M136812</guid>
      <dc:creator>xu_ji1</dc:creator>
      <dc:date>2019-04-25T01:09:37Z</dc:date>
    </item>
    <item>
      <title>Re: Question about  RPMsg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907548#M136813</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately, the i.MX8QX is still on preproduction and we do not have any official information available for the moment. I apologize for the inconveniences this could give you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Apr 2019 21:06:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907548#M136813</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-04-30T21:06:26Z</dc:date>
    </item>
    <item>
      <title>Re: Question about  RPMsg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907549#M136814</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello，&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How about i.MX7 chip?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 05 May 2019 10:24:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907549#M136814</guid>
      <dc:creator>xu_ji1</dc:creator>
      <dc:date>2019-05-05T10:24:08Z</dc:date>
    </item>
    <item>
      <title>Re: Question about  RPMsg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907550#M136815</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the i.MX7. The RPMsg is the Linux API that is in charge of communicating the core A7 and M4. The&amp;nbsp;RPMsg is a virtio-based messaging bus, which allows kernel drivers to communicate with remote processors available on the system.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The MU is the unit module from the i.MX that&amp;nbsp;enables two processors within the SoC to communicate and&lt;BR /&gt;coordinate by passing messages&amp;nbsp;(e.g. data, status and control) through the MU interface.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope this information could help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 06 May 2019 21:19:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907550#M136815</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-05-06T21:19:03Z</dc:date>
    </item>
    <item>
      <title>Re: Question about  RPMsg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907551#M136816</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello，&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Then the MU unit is a sub module in core A7 or M4 in i.MX7 ？&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 May 2019 01:32:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907551#M136816</guid>
      <dc:creator>xu_ji1</dc:creator>
      <dc:date>2019-05-07T01:32:39Z</dc:date>
    </item>
    <item>
      <title>Re: Question about  RPMsg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907552#M136817</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;On the i.MX7D, the A7 is the core principal of the i.MX. Every other peripheral, including the cortex M4, are submodules. However, the MU is the module that is in charge of coordinate by messages both cortex.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope this can help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 May 2019 14:31:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-about-RPMsg/m-p/907552#M136817</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-05-31T14:31:01Z</dc:date>
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