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    <title>i.MX Processors中的主题 Re: ECSPI2 on i.MX8M Mini EVK</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904316#M136451</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;EM style="color: #000000; background-color: #ffffff; border: 0px; font-size: 14.6667px;"&gt;For 'MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x00001916', which register is configured ? As per my understanding Pad Control Register for the same has access upto 8th bit. But value configured is more than that.&lt;/EM&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 20 Feb 2020 10:20:17 GMT</pubDate>
    <dc:creator>rutuja_patil</dc:creator>
    <dc:date>2020-02-20T10:20:17Z</dc:date>
    <item>
      <title>ECSPI2 on i.MX8M Mini EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904313#M136448</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I see that the ECSPI2 pins are brought out on J1003 on the imx8mmevk board, but I can't seem to make SPI work. I try running the ECSPI unit test, but it fails&amp;nbsp;suggesting the device isn't present. Can&amp;nbsp;someone please provide direction on what needs to be done (modify the device tree maybe?) and how to do it using yocto&amp;nbsp;on top of the fsl-validation-image-imx image?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Dave&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 May 2019 22:01:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904313#M136448</guid>
      <dc:creator>david_ochs1</dc:creator>
      <dc:date>2019-05-07T22:01:31Z</dc:date>
    </item>
    <item>
      <title>Re: ECSPI2 on i.MX8M Mini EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904314#M136449</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dave,&lt;/P&gt;&lt;P&gt;Have you enabled the ECSPI module on the Menu Config? Below you could find the required steps included on section 4.3.8 “Menu Configuration Options” of the i.MX Linux Reference Manual document (IMXLXRM Rev. L4.14.98-2.0.0_ga, 04/2019):&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;In menu configuration enable the following module:&lt;/P&gt;&lt;UL style="list-style-type: square;"&gt;&lt;LI&gt;CONFIG_SPI build support for the SPI core. In menuconfig, this option is available under:&lt;UL&gt;&lt;LI&gt;Device Drivers &amp;gt; SPI Support.&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;CONFIG_BITBANG is the Library code that is automatically selected by drivers that need it. SPI_IMX selects it. In menuconfig, this option is available under:&lt;UL&gt;&lt;LI&gt;Device Drivers &amp;gt; SPI Support &amp;gt; Utilities for Bitbanging SPI masters.&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;CONFIG_SPI_IMX implements the SPI master mode for ECSPI. In menuconfig, thisoption is available under:&lt;UL&gt;&lt;LI&gt;Device Drivers &amp;gt; SPI Support &amp;gt; Freescale i.MX SPI controllers.&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Hope this will be useful for you.&lt;BR /&gt;Best regards!&lt;BR /&gt;/Carlos&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 11 May 2019 19:24:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904314#M136449</guid>
      <dc:creator>CarlosCasillas</dc:creator>
      <dc:date>2019-05-11T19:24:54Z</dc:date>
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      <title>Re: ECSPI2 on i.MX8M Mini EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904315#M136450</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;In case anyone else has this question, here's what I did to enable it:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Enable User Mode SPI Device Driver Support with menuconfig&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;bitbake linux-imx -c menuconfig&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;The rest of the options that Carlos suggester were already enabled.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Add these lines to the iomux section of the fsl-imx8mmevk.dts (&amp;lt;yocto_dir&amp;gt;/&amp;lt;build_dir&amp;gt;/&lt;SPAN style="background-color: transparent; text-decoration: none; font-size: 11pt;"&gt;imx8_base_bsp/tmp/work/imx8mmevk-poky-linux/linux-imx/4.14.78-r0/git/arch/arm64/boot/dts/fsl-imx8mmevk.dts):&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: transparent; text-decoration: none; font-size: 11pt;"&gt;pinctrl_wdog: wdoggrp {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt;&amp;nbsp; MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6&lt;BR /&gt;&amp;nbsp; &amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;EM&gt;pinctrl_ecspi2: ecspi2grp {&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt; fsl,pins = &amp;lt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&amp;nbsp; MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x00000116&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&amp;nbsp; MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x00000116&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&amp;nbsp; MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x00001916&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&amp;nbsp; MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x00000116&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&amp;nbsp; &amp;gt;;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt; };&lt;/EM&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: transparent; text-decoration: none; font-size: 11pt;"&gt;...&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;&amp;amp;micfil {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp; pinctrl-names = "default";&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_pdm&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp; assigned-clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_PDM_SRC&amp;gt;, &amp;lt;&amp;amp;clk IMX8MM_CLK_PDM_DIV&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp; assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MM_AUDIO_PLL1_OUT&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp; assigned-clock-rates = &amp;lt;0&amp;gt;, &amp;lt;196608000&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp; status = "okay";&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;};&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt;&amp;amp;ecspi2 {&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;fsl,spi-num-chipselects = &amp;lt;1&amp;gt;; &lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;cs-gpios = &amp;lt;0&amp;gt;;&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-names = "default";&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ecspi2&amp;gt;;&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;status = "okay";&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;spidev@0x00 {&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;compatible = "spidev";&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;spi-max-frequency = &amp;lt;10000000&amp;gt;;&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;spi-cs-high;&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;reg = &amp;lt;0&amp;gt;;&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;/EM&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000000;"&gt;&lt;EM&gt;};&lt;/EM&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;For some reason, the chip select was the wrong polarity (active high) until I added the spi-cs-high field in the device tree. Either way, it clearly changes the polarity.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;I also modified the macro for DEV_SPI1 in the NXP test code (&amp;lt;yocto_dir&amp;gt;/&amp;lt;build_dir&amp;gt;/&lt;SPAN style="background-color: transparent; text-decoration: none; font-size: 11pt;"&gt;bsp/imx8_base_bsp3/tmp/work/imx8mmevk-poky-linux/imx-test/1_7.0+AUTOINC+04ec1d8040-r0/git/test/mxc_spi_test/mxc_spi_test1.c) so that it would work with /dev/spidev1.0:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: transparent; text-decoration: none; font-size: 11pt;"&gt;#define DEV_SPI1 &lt;SPAN style="background-color: transparent; text-decoration: none; font-size: 11pt;"&gt;"/dev/spidev1.0"&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;bitbake linux-imx -f -c compile&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;bitbake fsl-image-validation-imx&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;After loading the kernal and device tree, I see&amp;nbsp;CONFIG_SPI_SPIDEV=y when I run&amp;nbsp;zgrep SPI /proc/config.gz | grep -v SPIN | grep -v '^#', which tells me that the menuconfig change worked. Also, I see /dev/spidev1.0 on the board, so now ecspi2 is in the device tree.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 May 2019 14:18:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904315#M136450</guid>
      <dc:creator>david_ochs1</dc:creator>
      <dc:date>2019-05-16T14:18:33Z</dc:date>
    </item>
    <item>
      <title>Re: ECSPI2 on i.MX8M Mini EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904316#M136451</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;EM style="color: #000000; background-color: #ffffff; border: 0px; font-size: 14.6667px;"&gt;For 'MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x00001916', which register is configured ? As per my understanding Pad Control Register for the same has access upto 8th bit. But value configured is more than that.&lt;/EM&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Feb 2020 10:20:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904316#M136451</guid>
      <dc:creator>rutuja_patil</dc:creator>
      <dc:date>2020-02-20T10:20:17Z</dc:date>
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      <title>Re: ECSPI2 on i.MX8M Mini EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904317#M136452</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV style="color: #222222; background-color: #ffffff;"&gt;For 'MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK', correct is 0x00000016 and it is a 32 bit register.&lt;/DIV&gt;&lt;DIV style="color: #222222; background-color: #ffffff;"&gt;&lt;/DIV&gt;&lt;DIV style="color: #222222; background-color: #ffffff;"&gt;0x00001916 works, too, because there are reserved fields.&amp;nbsp;&lt;/DIV&gt;&lt;DIV style="color: #222222; background-color: #ffffff;"&gt;The screenshot from reference manual attached&lt;/DIV&gt;&lt;P&gt;&lt;EM style="color: #000000; background-color: #ffffff; border: 0px; font-size: 14.6667px;"&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/105085i223522B2F83D21E7/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/EM&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 May 2020 10:23:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI2-on-i-MX8M-Mini-EVK/m-p/904317#M136452</guid>
      <dc:creator>leexxa777</dc:creator>
      <dc:date>2020-05-12T10:23:47Z</dc:date>
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