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    <title>topic MDDR initialization code for IMX28 -blog archive in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/MDDR-initialization-code-for-IMX28-blog-archive/m-p/216012#M13631</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The freescale default BSP shows the DDR2 initialization code, the followed is the MDDR case:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void MDDREmiController_166MHz(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;volatile UINT32* DRAM_REG = (volatile UINT32*) HW_DRAM_CTL00_ADDR;&lt;/P&gt;&lt;P&gt;&amp;nbsp;DRAM_REG[0]&amp;nbsp; = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[16] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[21] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[22] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[23] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[24] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[25] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[26] = 0x00010101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[27] = 0x01010101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[28] = 0x000f0f01;&lt;BR /&gt;&amp;nbsp;DRAM_REG[29] = 0x0f02020a;&lt;BR /&gt;&amp;nbsp;DRAM_REG[31] = 0x00000101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[32] = 0x00000100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[33] = 0x00000100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[34] = 0x01000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[35] = 0x00000002;&lt;BR /&gt;&amp;nbsp;DRAM_REG[36] = 0x01010000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[37] = 0x08060301;&lt;BR /&gt;&amp;nbsp;DRAM_REG[38] = 0x06000001;&lt;BR /&gt;&amp;nbsp;DRAM_REG[39] = 0x0a000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[40] = 0x02009c40;&lt;BR /&gt;&amp;nbsp;DRAM_REG[41] = 0x0002030b;&lt;BR /&gt;&amp;nbsp;DRAM_REG[42] = 0x0036a608;&lt;BR /&gt;&amp;nbsp;DRAM_REG[43] = 0x03160305;&lt;BR /&gt;&amp;nbsp;DRAM_REG[44] = 0x03030002;&lt;BR /&gt;&amp;nbsp;DRAM_REG[45] = 0x001f001c;&lt;BR /&gt;&amp;nbsp;DRAM_REG[48] = 0x00012100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[49] = 0xffff0303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[50] = 0x00012100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[51] = 0xffff0303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[52] = 0x00012100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[53] = 0xffff0303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[54] = 0x00012100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[55] = 0xffff0303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[56] = 0x00000003;&lt;BR /&gt;&amp;nbsp;DRAM_REG[58] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[66] = 0x00000305;&lt;BR /&gt;&amp;nbsp;DRAM_REG[67] = 0x01000f02;&lt;BR /&gt;&amp;nbsp;DRAM_REG[69] = 0x00000200;&lt;BR /&gt;&amp;nbsp;DRAM_REG[70] = 0x00020007;&lt;BR /&gt;&amp;nbsp;DRAM_REG[71] = 0xf3004a27;&lt;BR /&gt;&amp;nbsp;DRAM_REG[72] = 0xf3004a27;&lt;BR /&gt;&amp;nbsp;DRAM_REG[75] = 0x07000310;&lt;BR /&gt;&amp;nbsp;DRAM_REG[76] = 0x07000310;&lt;BR /&gt;&amp;nbsp;DRAM_REG[79] = 0x00800004;&lt;BR /&gt;&amp;nbsp;DRAM_REG[80] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[81] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[82] = 0x01000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[83] = 0x01020408;&lt;BR /&gt;&amp;nbsp;DRAM_REG[84] = 0x08040201;&lt;BR /&gt;&amp;nbsp;DRAM_REG[85] = 0x000f1133;&lt;BR /&gt;&amp;nbsp;DRAM_REG[87] = 0x00001f08;&lt;BR /&gt;&amp;nbsp;DRAM_REG[88] = 0x00001f08;&lt;BR /&gt;&amp;nbsp;DRAM_REG[91] = 0x00001f01;&lt;BR /&gt;&amp;nbsp;DRAM_REG[92] = 0x00001f01;&lt;BR /&gt;&amp;nbsp;DRAM_REG[162] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[163] = 0x00010301;&lt;BR /&gt;&amp;nbsp;DRAM_REG[164] = 0x00000002;&lt;BR /&gt;&amp;nbsp;DRAM_REG[171] = 0x01010000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[172] = 0x01000100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[173] = 0x03030000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[174] = 0x00020303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[175] = 0x01010202;&lt;BR /&gt;&amp;nbsp;DRAM_REG[176] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[177] = 0x01030101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[178] = 0x21002101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[179] = 0x00030500;&lt;BR /&gt;&amp;nbsp;DRAM_REG[180] = 0x03050305;&lt;BR /&gt;&amp;nbsp;DRAM_REG[181] = 0x00320032;&lt;BR /&gt;&amp;nbsp;DRAM_REG[182] = 0x00320032;&lt;BR /&gt;&amp;nbsp;DRAM_REG[183] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[184] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[185] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[186] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[187] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[188] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[189] = 0xffffffff;&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 01 Mar 2012 02:05:07 GMT</pubDate>
    <dc:creator>qiang_li-mpu_se</dc:creator>
    <dc:date>2012-03-01T02:05:07Z</dc:date>
    <item>
      <title>MDDR initialization code for IMX28 -blog archive</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MDDR-initialization-code-for-IMX28-blog-archive/m-p/216012#M13631</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The freescale default BSP shows the DDR2 initialization code, the followed is the MDDR case:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void MDDREmiController_166MHz(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;volatile UINT32* DRAM_REG = (volatile UINT32*) HW_DRAM_CTL00_ADDR;&lt;/P&gt;&lt;P&gt;&amp;nbsp;DRAM_REG[0]&amp;nbsp; = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[16] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[21] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[22] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[23] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[24] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[25] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[26] = 0x00010101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[27] = 0x01010101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[28] = 0x000f0f01;&lt;BR /&gt;&amp;nbsp;DRAM_REG[29] = 0x0f02020a;&lt;BR /&gt;&amp;nbsp;DRAM_REG[31] = 0x00000101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[32] = 0x00000100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[33] = 0x00000100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[34] = 0x01000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[35] = 0x00000002;&lt;BR /&gt;&amp;nbsp;DRAM_REG[36] = 0x01010000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[37] = 0x08060301;&lt;BR /&gt;&amp;nbsp;DRAM_REG[38] = 0x06000001;&lt;BR /&gt;&amp;nbsp;DRAM_REG[39] = 0x0a000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[40] = 0x02009c40;&lt;BR /&gt;&amp;nbsp;DRAM_REG[41] = 0x0002030b;&lt;BR /&gt;&amp;nbsp;DRAM_REG[42] = 0x0036a608;&lt;BR /&gt;&amp;nbsp;DRAM_REG[43] = 0x03160305;&lt;BR /&gt;&amp;nbsp;DRAM_REG[44] = 0x03030002;&lt;BR /&gt;&amp;nbsp;DRAM_REG[45] = 0x001f001c;&lt;BR /&gt;&amp;nbsp;DRAM_REG[48] = 0x00012100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[49] = 0xffff0303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[50] = 0x00012100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[51] = 0xffff0303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[52] = 0x00012100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[53] = 0xffff0303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[54] = 0x00012100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[55] = 0xffff0303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[56] = 0x00000003;&lt;BR /&gt;&amp;nbsp;DRAM_REG[58] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[66] = 0x00000305;&lt;BR /&gt;&amp;nbsp;DRAM_REG[67] = 0x01000f02;&lt;BR /&gt;&amp;nbsp;DRAM_REG[69] = 0x00000200;&lt;BR /&gt;&amp;nbsp;DRAM_REG[70] = 0x00020007;&lt;BR /&gt;&amp;nbsp;DRAM_REG[71] = 0xf3004a27;&lt;BR /&gt;&amp;nbsp;DRAM_REG[72] = 0xf3004a27;&lt;BR /&gt;&amp;nbsp;DRAM_REG[75] = 0x07000310;&lt;BR /&gt;&amp;nbsp;DRAM_REG[76] = 0x07000310;&lt;BR /&gt;&amp;nbsp;DRAM_REG[79] = 0x00800004;&lt;BR /&gt;&amp;nbsp;DRAM_REG[80] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[81] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[82] = 0x01000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[83] = 0x01020408;&lt;BR /&gt;&amp;nbsp;DRAM_REG[84] = 0x08040201;&lt;BR /&gt;&amp;nbsp;DRAM_REG[85] = 0x000f1133;&lt;BR /&gt;&amp;nbsp;DRAM_REG[87] = 0x00001f08;&lt;BR /&gt;&amp;nbsp;DRAM_REG[88] = 0x00001f08;&lt;BR /&gt;&amp;nbsp;DRAM_REG[91] = 0x00001f01;&lt;BR /&gt;&amp;nbsp;DRAM_REG[92] = 0x00001f01;&lt;BR /&gt;&amp;nbsp;DRAM_REG[162] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[163] = 0x00010301;&lt;BR /&gt;&amp;nbsp;DRAM_REG[164] = 0x00000002;&lt;BR /&gt;&amp;nbsp;DRAM_REG[171] = 0x01010000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[172] = 0x01000100;&lt;BR /&gt;&amp;nbsp;DRAM_REG[173] = 0x03030000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[174] = 0x00020303;&lt;BR /&gt;&amp;nbsp;DRAM_REG[175] = 0x01010202;&lt;BR /&gt;&amp;nbsp;DRAM_REG[176] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[177] = 0x01030101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[178] = 0x21002101;&lt;BR /&gt;&amp;nbsp;DRAM_REG[179] = 0x00030500;&lt;BR /&gt;&amp;nbsp;DRAM_REG[180] = 0x03050305;&lt;BR /&gt;&amp;nbsp;DRAM_REG[181] = 0x00320032;&lt;BR /&gt;&amp;nbsp;DRAM_REG[182] = 0x00320032;&lt;BR /&gt;&amp;nbsp;DRAM_REG[183] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[184] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[185] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[186] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[187] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[188] = 0x00000000;&lt;BR /&gt;&amp;nbsp;DRAM_REG[189] = 0xffffffff;&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Mar 2012 02:05:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MDDR-initialization-code-for-IMX28-blog-archive/m-p/216012#M13631</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2012-03-01T02:05:07Z</dc:date>
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