<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Using SRC_BOOT_CFGx pins as GPIOs?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRC-BOOT-CFGx-pins-as-GPIOs/m-p/898586#M135615</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor,&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Warm Regards.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Emil Zacharia George | Senior Hardware Design Engineer&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;*Mob: +91 **9061665533 *&lt;STRONG&gt;| Skype: emilgeorge93&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 20 May 2019 06:53:25 GMT</pubDate>
    <dc:creator>emilzachariageo</dc:creator>
    <dc:date>2019-05-20T06:53:25Z</dc:date>
    <item>
      <title>Using SRC_BOOT_CFGx pins as GPIOs?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRC-BOOT-CFGx-pins-as-GPIOs/m-p/898584#M135613</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Team,&lt;/P&gt;&lt;P&gt;Can we use the&amp;nbsp;SRC_BOOT_CFGx pins as GPIO pins or some SPI dedicated pin?&lt;/P&gt;&lt;P&gt;Are they sampled only during the boot time?&lt;/P&gt;&lt;P&gt;If so, is it okay if we provide the required pull-ups and pull-downs to these pins to set required boot option?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;&lt;P&gt;Emil&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 17 May 2019 13:12:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-SRC-BOOT-CFGx-pins-as-GPIOs/m-p/898584#M135613</guid>
      <dc:creator>emilzachariageo</dc:creator>
      <dc:date>2019-05-17T13:12:25Z</dc:date>
    </item>
    <item>
      <title>Re: Using SRC_BOOT_CFGx pins as GPIOs?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRC-BOOT-CFGx-pins-as-GPIOs/m-p/898585#M135614</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Emil&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes this is possible, one can look on sect.2.3 Bus isolation circuit&lt;/P&gt;&lt;P&gt;i.MX6 System Development User’s Guide &lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf"&gt;https://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 17 May 2019 23:08:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-SRC-BOOT-CFGx-pins-as-GPIOs/m-p/898585#M135614</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-05-17T23:08:35Z</dc:date>
    </item>
    <item>
      <title>Re: Using SRC_BOOT_CFGx pins as GPIOs?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRC-BOOT-CFGx-pins-as-GPIOs/m-p/898586#M135615</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor,&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Warm Regards.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Emil Zacharia George | Senior Hardware Design Engineer&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;*Mob: +91 **9061665533 *&lt;STRONG&gt;| Skype: emilgeorge93&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 May 2019 06:53:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-SRC-BOOT-CFGx-pins-as-GPIOs/m-p/898586#M135615</guid>
      <dc:creator>emilzachariageo</dc:creator>
      <dc:date>2019-05-20T06:53:25Z</dc:date>
    </item>
  </channel>
</rss>

