topic Re: imx28 DMA in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885317#M134114 <HTML><HEAD></HEAD><BODY><P>If the dest and source address can be programmed,the memory to memory access can be implemented.</P><P>what's about&nbsp;PIOWORD?</P><P></P><P>The CMDPIOWORDS field, if nonzero,<BR />instructs the DMA engine to copy these words to the APB, beginning at the first<BR />register address offset for the peripheral and and incrementing the register offset each<BR />cycle.</P></BODY></HTML> Mon, 08 Apr 2019 08:09:15 GMT liuxing 2019-04-08T08:09:15Z imx28 DMA https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885313#M134110 <HTML><HEAD></HEAD><BODY><P>Does the DMA of imx28 support memory- to-memory transfer?I mean that transfer data block in DDR.</P><P></P><P><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/79388i42D2989B75F704E3/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /></span></P></BODY></HTML> Mon, 08 Apr 2019 06:17:25 GMT https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885313#M134110 liuxing 2019-04-08T06:17:25Z Re: imx28 DMA https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885314#M134111 <HTML><HEAD></HEAD><BODY><P>Hi xing</P><P></P><P>I believe you are right, dma does not support memory to memory transfers.</P><P></P><P>Best regards<BR />igor<BR />-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Mon, 08 Apr 2019 07:19:20 GMT https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885314#M134111 igorpadykov 2019-04-08T07:19:20Z Re: imx28 DMA https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885315#M134112 <HTML><HEAD></HEAD><BODY><P>Thanks a lot!</P><P>Are you sure this&nbsp;conclusion?what's the&nbsp;function of the empty channel?</P></BODY></HTML> Mon, 08 Apr 2019 07:56:12 GMT https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885315#M134112 liuxing 2019-04-08T07:56:12Z Re: imx28 DMA https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885316#M134113 <HTML><HEAD></HEAD><BODY><P>I think the dest/source address of channel 0~13 is constant.Is it right?</P><P>If I want to access the whole physical memory,do you have a way to implement it?I wanted to implement it via DMA.</P></BODY></HTML> Mon, 08 Apr 2019 08:05:45 GMT https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885316#M134113 liuxing 2019-04-08T08:05:45Z Re: imx28 DMA https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885317#M134114 <HTML><HEAD></HEAD><BODY><P>If the dest and source address can be programmed,the memory to memory access can be implemented.</P><P>what's about&nbsp;PIOWORD?</P><P></P><P>The CMDPIOWORDS field, if nonzero,<BR />instructs the DMA engine to copy these words to the APB, beginning at the first<BR />register address offset for the peripheral and and incrementing the register offset each<BR />cycle.</P></BODY></HTML> Mon, 08 Apr 2019 08:09:15 GMT https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885317#M134114 liuxing 2019-04-08T08:09:15Z Re: imx28 DMA https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885318#M134115 <HTML><HEAD></HEAD><BODY><P>&gt; address of channel 0~13 is constant.Is it right?</P><P></P><P>yes, right.</P><P></P><P>Best regards<BR />igor</P></BODY></HTML> Mon, 08 Apr 2019 09:58:20 GMT https://community.nxp.com/t5/i-MX-Processors/imx28-DMA/m-p/885318#M134115 igorpadykov 2019-04-08T09:58:20Z