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    <title>i.MX ProcessorsのトピックRe: How to use multiple UARTs in IMX6Q</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-use-multiple-UARTs-in-IMX6Q/m-p/880118#M133440</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Jun Heo,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does this problem persist? If possible, I would recommend using one of the NXP BSP Release kernels.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 18 Apr 2019 17:08:44 GMT</pubDate>
    <dc:creator>gusarambula</dc:creator>
    <dc:date>2019-04-18T17:08:44Z</dc:date>
    <item>
      <title>How to use multiple UARTs in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-use-multiple-UARTs-in-IMX6Q/m-p/880117#M133439</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have a problem.&lt;/P&gt;&lt;P&gt;How do I enable uart0, 1, 2, 4&amp;nbsp;in the 3.0.35 linux kernel build for an i.MX6Q SabreSD based design?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;board-mx6q_sabresd.h&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/75149iFA90551B2F264DF8/image-size/large?v=v2&amp;amp;px=999" title="board-mx6q_sabresd_h.PNG" alt="board-mx6q_sabresd_h.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;board-mx6q_sabresd.c&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/75209i2814A96C48B8E132/image-size/large?v=v2&amp;amp;px=999" title="board-mx6q_sabresd_c.PNG" alt="board-mx6q_sabresd_c.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I found ttymxc0 ~ 4 on the console after booting.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/75247iF1845852CA16298E/image-size/large?v=v2&amp;amp;px=999" title="consol_mxctty0_4.PNG" alt="consol_mxctty0_4.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but, uart0 and&amp;nbsp;uart1 only work.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 Feb 2019 09:06:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-use-multiple-UARTs-in-IMX6Q/m-p/880117#M133439</guid>
      <dc:creator>magicarrow98</dc:creator>
      <dc:date>2019-02-21T09:06:07Z</dc:date>
    </item>
    <item>
      <title>Re: How to use multiple UARTs in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-use-multiple-UARTs-in-IMX6Q/m-p/880118#M133440</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Jun Heo,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does this problem persist? If possible, I would recommend using one of the NXP BSP Release kernels.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Apr 2019 17:08:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-use-multiple-UARTs-in-IMX6Q/m-p/880118#M133440</guid>
      <dc:creator>gusarambula</dc:creator>
      <dc:date>2019-04-18T17:08:44Z</dc:date>
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