topic Re: i.MX8QXP_LPDDR4 Extra Pins in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-Extra-Pins/m-p/880096#M133438 <HTML><HEAD></HEAD><BODY><P>Hello Nickolay Motorin,</P><P></P><P>The i.MX8QXP documentation is still nor publicly released so I would need to ask you to please contact your NXP Distributor or FAE for more information on what documents are available. The i.MX documentation at the time of a processor’s release include recommendation for unused pins and interfaces.</P><P></P><P>My apologies for the inconvenience.</P><P></P><P>Regards,</P></BODY></HTML> Mon, 08 Apr 2019 19:42:37 GMT gusarambula 2019-04-08T19:42:37Z i.MX8QXP_LPDDR4 Extra Pins https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-Extra-Pins/m-p/880095#M133437 <HTML><HEAD></HEAD><BODY><P style="color: #51626f; background-color: #ffffff; border: 0px;">Dear NXP,</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">I am hardware engineer. Now i am working on development SoM with using i.MX8QuadXPlus.</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">I am using 2-die LPDDR4 memory. What i need to do with extra i.MX8QuadXPlus pins (CS1_A, CS1_B, CKE1_A, CKE1_B). I need to left this pins floating or use resistors to pull up or pull down or connect to LPDDR4 NC pins?</P><P style="color: #51626f; background-color: #ffffff; border: 0px;"><SPAN>#</SPAN><SPAN style="border: 0px;">i.MX8QuadXPlus</SPAN></P></BODY></HTML> Thu, 04 Apr 2019 10:05:58 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-Extra-Pins/m-p/880095#M133437 motorinnv94 2019-04-04T10:05:58Z Re: i.MX8QXP_LPDDR4 Extra Pins https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-Extra-Pins/m-p/880096#M133438 <HTML><HEAD></HEAD><BODY><P>Hello Nickolay Motorin,</P><P></P><P>The i.MX8QXP documentation is still nor publicly released so I would need to ask you to please contact your NXP Distributor or FAE for more information on what documents are available. The i.MX documentation at the time of a processor’s release include recommendation for unused pins and interfaces.</P><P></P><P>My apologies for the inconvenience.</P><P></P><P>Regards,</P></BODY></HTML> Mon, 08 Apr 2019 19:42:37 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-Extra-Pins/m-p/880096#M133438 gusarambula 2019-04-08T19:42:37Z