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    <title>topic Re: IPU equilavent component in IMX8MQ processor in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870233#M132336</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Diego,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for confirmation about DCSS output to MIPI DSI!!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I didn't understand this:&lt;/P&gt;&lt;P&gt;"&lt;STRONG&gt;Regarding the LCDIF module, it is not muxed, since the boot pines are the same&amp;nbsp;as the LCDIF.&lt;/STRONG&gt;"&lt;/P&gt;&lt;P&gt;One more query about this discussion. In our product we want to use LCD and HDMI display simultaneously.&lt;/P&gt;&lt;P&gt;We want to do scale up/down, Rotate, Overlay on LCD display. And scale up/down on HDMI display. (We have achieved this usecase in IMX6Q processor)&lt;/P&gt;&lt;P&gt;With IMX8MQ processor is this use case possible? &lt;/P&gt;&lt;P&gt;I am asking this because based on what I have read in Technical Reference Manual I found that DCSS is IPU equivalent (having feature like Scale up/down, Overlay, Rotate)component in IMX8MQ processor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;It can send output either to MIP-DSI or HDMI. And other is LCDIF interface component which doesn't support Scale up/down, Rotate etc. It only supports overlay feature (Based on Technical Reference Manual). So I am confused weather usecase we want to achieve will be possible or not.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 05 Mar 2019 05:56:27 GMT</pubDate>
    <dc:creator>jemish_1990</dc:creator>
    <dc:date>2019-03-05T05:56:27Z</dc:date>
    <item>
      <title>IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870229#M132332</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are going to make product based on IMX8MQ (MIMX8MQ6DVAJZAA) processor.&amp;nbsp; Currently we are doing POC on IMX8MQ processor EVK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;In our product requirement we will be capturing (PAL, NTSC) and display video on LCD (800x1280).&lt;/LI&gt;&lt;LI&gt;Our capture interface is based on MIPI-CSI and LCD interface MIPI-DSI.&lt;/LI&gt;&lt;LI&gt;Based on my first point we need to upscale video before displaying on LCD. Which component is responsible it?&lt;/LI&gt;&lt;LI&gt;Second requirement is our LCD is in portrait mode. We need to display content in Landscape mode.&lt;/LI&gt;&lt;LI&gt;In IMX6Q processor we did rotation using IPU is there any similar component here.&lt;/LI&gt;&lt;LI&gt;I read that DCSS (Display Controller Subsystem) has scaling and rotation feature. In TRM (Technical Reference Manual) I also found that this component is only applicable for HDMI display (correct me if my understanding is wrong)&lt;/LI&gt;&lt;LI&gt;I would like to know which component&amp;nbsp; in IMX8MQ is responsible if we want for the feature like: scale, rotate, color conversion, deinterlace etc.&lt;/LI&gt;&lt;LI&gt;Is there any reference application or source code available to demonstrate such capabilities of IMXMQ processor?&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Feb 2019 14:39:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870229#M132332</guid>
      <dc:creator>jemish_1990</dc:creator>
      <dc:date>2019-02-18T14:39:46Z</dc:date>
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      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870230#M132333</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What I am aware,&amp;nbsp;the module that is similar to the IPU for the i.MX8MQ is the DCSS. Also what I am aware, it has support for MIPI-DSI. However, let me verify this internally.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Nevertheless, our i.MX8MQ have the module LCD-IF that is specialized for LCD displays. For more information, please see chapter 13.2 of our reference manual.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope this can help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Feb 2019 22:08:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870230#M132333</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-02-26T22:08:30Z</dc:date>
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    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870231#M132334</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Diego,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your reply!&lt;/P&gt;&lt;P&gt;I will surely go through TRM chapter 13.2. But please confirm weather DCSS is applicable for MIPI-DSI? Because the way it was described at start of chapter is confusing. This is the description at the start of chapter:&amp;nbsp; (Chapter 15&lt;BR /&gt;Display Controller Subsystem (DCSS))&lt;/P&gt;&lt;P&gt;"&lt;STRONG&gt;The Display Controller Subsystem (DCSS) is used to source up to three display buffers,&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;compose them, and drive a display using HDMI 2.0a with HDCP 2.2."&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have query about eLCDIF interface. While reading that chapter based on interfaces (MPU, VSYNC, DOTCLOCK, BT 656 ) it has pins usage. (TRM : 13.2.4.12 LCDIF Pin Usage by Interface Mode). Question is I don't find any of these pins (LCD_RS, LCD_CS, LCD_WR, LCD_DATA23 etc) in pinmux/IOMUX.&amp;nbsp; Is eLCDIF managed internally? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will try to understand more by reading Technical Reference Manual but it will be great if you can help me to correct my understanding.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Feb 2019 07:06:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870231#M132334</guid>
      <dc:creator>jemish_1990</dc:creator>
      <dc:date>2019-02-27T07:06:57Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870232#M132335</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The DCSS it does have MIPI-DSI output, however it will not be at 4K.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regarding the LCDIF module, it is not muxed, since the boot pines are the same&amp;nbsp;as the LCDIF.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope this can help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 04 Mar 2019 21:45:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870232#M132335</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-03-04T21:45:22Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870233#M132336</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Diego,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for confirmation about DCSS output to MIPI DSI!!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I didn't understand this:&lt;/P&gt;&lt;P&gt;"&lt;STRONG&gt;Regarding the LCDIF module, it is not muxed, since the boot pines are the same&amp;nbsp;as the LCDIF.&lt;/STRONG&gt;"&lt;/P&gt;&lt;P&gt;One more query about this discussion. In our product we want to use LCD and HDMI display simultaneously.&lt;/P&gt;&lt;P&gt;We want to do scale up/down, Rotate, Overlay on LCD display. And scale up/down on HDMI display. (We have achieved this usecase in IMX6Q processor)&lt;/P&gt;&lt;P&gt;With IMX8MQ processor is this use case possible? &lt;/P&gt;&lt;P&gt;I am asking this because based on what I have read in Technical Reference Manual I found that DCSS is IPU equivalent (having feature like Scale up/down, Overlay, Rotate)component in IMX8MQ processor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;It can send output either to MIP-DSI or HDMI. And other is LCDIF interface component which doesn't support Scale up/down, Rotate etc. It only supports overlay feature (Based on Technical Reference Manual). So I am confused weather usecase we want to achieve will be possible or not.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 05 Mar 2019 05:56:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870233#M132336</guid>
      <dc:creator>jemish_1990</dc:creator>
      <dc:date>2019-03-05T05:56:27Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870234#M132337</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Diego,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is there any update on this? As inputs on this discussion is critical for us.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Mar 2019 11:58:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870234#M132337</guid>
      <dc:creator>jemish_1990</dc:creator>
      <dc:date>2019-03-12T11:58:19Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870235#M132338</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Reviewing this with internal coworkers. They told me that the DCSS theoretically could substitute the IPU on the i.MX8M it has similar features that the IPU has on the i.MX6. However, I am reviewing if there could be an example that could help you test the DCSS.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Mar 2019 23:03:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870235#M132338</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-03-12T23:03:39Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870236#M132339</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Diego, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Based on Technical Reference Manual&amp;nbsp; it seems that DCSS doesn't support rotation feature.&lt;/P&gt;&lt;P&gt;What should I use for video rotation (VPU/GPU)? Is there any reference available for it as starting point?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Mar 2019 09:43:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870236#M132339</guid>
      <dc:creator>jemish_1990</dc:creator>
      <dc:date>2019-03-14T09:43:41Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870237#M132340</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I apologize for the delay.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;To rotate the display, it can easily be done by the GPU.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Mar 2019 20:11:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870237#M132340</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-03-26T20:11:03Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870238#M132341</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Diego,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you point me to some documentation&amp;nbsp; or reference code for starting point?&lt;/P&gt;&lt;P&gt;While searching my self I found "i.MX Graphics User’s Guide". I following that. But it will be helpful if you can point me to some source code.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Mar 2019 06:09:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870238#M132341</guid>
      <dc:creator>jemish_1990</dc:creator>
      <dc:date>2019-03-27T06:09:42Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870239#M132342</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Diego,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are using kernel repository "&lt;A class="" href="https://source.codeaurora.org/external/imx/linux-imx" title="https://source.codeaurora.org/external/imx/linux-imx"&gt;linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;"&amp;nbsp; branch "imx_4.14.78_1.0.0_ga" for our development.&lt;/P&gt;&lt;P&gt;One more thing I found while going through source code. I found that eLCDIF interface driver doesn't provide overlay support. Though it was mentioned in Technical Reference Manual.&amp;nbsp; I have verified it using "modetest" utility.&lt;/P&gt;&lt;P&gt;Is there any commit for that adds overlay support in eLCDIF driver? This feature It is very crucial for our product.&lt;/P&gt;&lt;P&gt;If there is not such commit yet may I know weather we will receive this support in future.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is overlay support on DCSS but didn't found overlay support for eLCDIF driver.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Mar 2019 12:22:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870239#M132342</guid>
      <dc:creator>jemish_1990</dc:creator>
      <dc:date>2019-03-28T12:22:17Z</dc:date>
    </item>
    <item>
      <title>Re: IPU equilavent component in IMX8MQ processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870240#M132343</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Diego,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is there chroma conversion support in DCSS (example: NV12 to YUV interleaved formats (UYVY or YUYV))?&lt;/P&gt;&lt;P&gt;If yes than is there any API available for chroma conversion?&lt;/P&gt;&lt;P&gt;We need this feature in DCSS as we come to know from NXP that current silicon revision of IMX8MQ doesn't support post processing in VPU, and VPU output NV12 that display can't understand. So we have to provide YUV interleaved format for display.&lt;/P&gt;&lt;P&gt;If DCSS doesn't support this feature please let us know any alternative for that.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jemish&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Apr 2019 06:07:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-equilavent-component-in-IMX8MQ-processor/m-p/870240#M132343</guid>
      <dc:creator>jemish_1990</dc:creator>
      <dc:date>2019-04-05T06:07:36Z</dc:date>
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