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    <title>topic Re: sgtl5000 latency in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/sgtl5000-latency/m-p/857731#M131061</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dat&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;seems power up and down is performed in driver for reducing overall board power consumption.&lt;/P&gt;&lt;P&gt;May be useful to check how power is handled in baremetal i.MX6 SDK sgtl5000 tests&lt;/P&gt;&lt;P&gt;(zip is available on &lt;A href="https://community.nxp.com/thread/432859"&gt;https://community.nxp.com/thread/432859&lt;/A&gt;&amp;nbsp; )&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 14 Mar 2019 23:22:41 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2019-03-14T23:22:41Z</dc:date>
    <item>
      <title>sgtl5000 latency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/sgtl5000-latency/m-p/857730#M131060</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Using an iMX6 and SGTL5000 for audio, I noticed a 400ms delay when snd_pcm_prepare() is called. Looking at the&amp;nbsp;sgtl5000.c codec driver,&amp;nbsp;there is a&amp;nbsp;sleep of 400ms when the power management powers up and powers down. For some&amp;nbsp;reason the call to power up is always called on snd_pcm_prepare()&amp;nbsp;even when&amp;nbsp;the audio codec power never went down. I added a state to keep track of it in the codec driver as a workaround to not delay unless necessary. While this workaround works, I don't think it's the best solution.&amp;nbsp;Does someone know why the power up section of code is always called&amp;nbsp;in the driver? Thanks&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;+diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c&lt;BR /&gt;+index 6668845..3aaf384 100644&lt;BR /&gt;+--- a/sound/soc/codecs/sgtl5000.c&lt;BR /&gt;++++ b/sound/soc/codecs/sgtl5000.c&lt;BR /&gt;+@@ -152,6 +152,8 @@ static int mic_bias_event(struct snd_soc_dapm_widget *w,&lt;BR /&gt;+ static int power_vag_event(struct snd_soc_dapm_widget *w,&lt;BR /&gt;+ &amp;nbsp;struct snd_kcontrol *kcontrol, int event)&lt;BR /&gt;+ {&lt;BR /&gt;++&amp;nbsp;static bool is_power_up = false;&lt;BR /&gt;++&lt;BR /&gt;+ &amp;nbsp;struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w-&amp;gt;dapm);&lt;BR /&gt;+ &amp;nbsp;const u32 mask = SGTL5000_DAC_POWERUP | SGTL5000_ADC_POWERUP;&lt;BR /&gt;+ &lt;BR /&gt;+@@ -159,7 +161,12 @@ static int power_vag_event(struct snd_soc_dapm_widget *w,&lt;BR /&gt;+ &amp;nbsp;case SND_SOC_DAPM_POST_PMU:&lt;BR /&gt;+ &amp;nbsp;&amp;nbsp;snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,&lt;BR /&gt;+ &amp;nbsp;&amp;nbsp;&amp;nbsp;SGTL5000_VAG_POWERUP, SGTL5000_VAG_POWERUP);&lt;BR /&gt;+-&amp;nbsp;&amp;nbsp;msleep(400);&lt;BR /&gt;++&lt;BR /&gt;++&amp;nbsp;&amp;nbsp;if (is_power_up == false)&lt;BR /&gt;++&amp;nbsp;&amp;nbsp;{&lt;BR /&gt;++&amp;nbsp;&amp;nbsp;&amp;nbsp;msleep(400);&lt;BR /&gt;++&amp;nbsp;&amp;nbsp;&amp;nbsp;is_power_up = true;&lt;BR /&gt;++&amp;nbsp;&amp;nbsp;}&lt;BR /&gt;+ &amp;nbsp;&amp;nbsp;break;&lt;BR /&gt;+ &lt;BR /&gt;+ &amp;nbsp;case SND_SOC_DAPM_PRE_PMD:&lt;BR /&gt;+@@ -173,6 +180,7 @@ static int power_vag_event(struct snd_soc_dapm_widget *w,&lt;BR /&gt;+ &amp;nbsp;&amp;nbsp;&amp;nbsp;snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,&lt;BR /&gt;+ &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SGTL5000_VAG_POWERUP, 0);&lt;BR /&gt;+ &amp;nbsp;&amp;nbsp;&amp;nbsp;msleep(400);&lt;BR /&gt;++&amp;nbsp;&amp;nbsp;&amp;nbsp;is_power_up = false;&lt;BR /&gt;+ &amp;nbsp;&amp;nbsp;}&lt;BR /&gt;+ &amp;nbsp;&amp;nbsp;break;&lt;BR /&gt;+ &amp;nbsp;default:&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Mar 2019 12:10:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/sgtl5000-latency/m-p/857730#M131060</guid>
      <dc:creator>dtran11</dc:creator>
      <dc:date>2019-03-14T12:10:10Z</dc:date>
    </item>
    <item>
      <title>Re: sgtl5000 latency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/sgtl5000-latency/m-p/857731#M131061</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dat&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;seems power up and down is performed in driver for reducing overall board power consumption.&lt;/P&gt;&lt;P&gt;May be useful to check how power is handled in baremetal i.MX6 SDK sgtl5000 tests&lt;/P&gt;&lt;P&gt;(zip is available on &lt;A href="https://community.nxp.com/thread/432859"&gt;https://community.nxp.com/thread/432859&lt;/A&gt;&amp;nbsp; )&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Mar 2019 23:22:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/sgtl5000-latency/m-p/857731#M131061</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-03-14T23:22:41Z</dc:date>
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