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    <title>i.MX ProcessorsのトピックiMX7ULP clocks issue</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX7ULP-clocks-issue/m-p/857093#M130996</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to implement support of &lt;A href="https://lore.kernel.org/lkml/20190122124204.GA26969@kroah.com/T/#u" title="https://lore.kernel.org/lkml/20190122124204.GA26969@kroah.com/T/#u"&gt;interconnect API&lt;/A&gt; on iMX7ULP (provides similar features as busfreq),&lt;/P&gt;&lt;P&gt;I would like to scale some clocks.&lt;/P&gt;&lt;P&gt;At runtime, the framework is going to scale nic0, nic1 and ddr clocks, so I must ensure that scaling one of these clocks won't cause any glitches.&lt;BR /&gt;The easiest way to do this it to re-parent the clocks which use nic0, nic1, or ddr clock for their peripheral clock.&lt;BR /&gt;Basically, I would like to use apll_pfd0, apll_pfd1 or apll_pfd2 as peripheral clock, and apll_pfd3 as source clock of ddr (and so, nic0 and nic1).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But, for some usecases, such as display, default pfd ferquencies are too high, and this can't be used as peripheral clock.&lt;BR /&gt;So, I tried to reconfigure the APLL frequency, and the PFDs to have a frequency low enough to be used by peripheral clocks, but since, the display is broken.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After many tests, it looks like that if the APLL frequency is too low (although this respects TRM recommendation),&lt;/P&gt;&lt;P&gt;then the lcdif / dsi doesn't work, although their clocks are exactly the same.&lt;/P&gt;&lt;P&gt;As example, this configuration (default) work:&lt;BR /&gt;- PLL frequency: 529200000 Hz (mult: 22, num:1, denom: 20)&lt;BR /&gt;- PFD0 (and DDR) frequency: 352800000 Hz (pfd: 27)&lt;/P&gt;&lt;P&gt;- NIC0 (and NIC1) frequency: 176400000 Hz&lt;BR /&gt;- LCDIF: 25200000 Hz (640x480@60Hz)&lt;/P&gt;&lt;P&gt;And this one doesn't:&lt;/P&gt;&lt;P&gt;- PLL frequency: 392000000 Hz (mult: 16, num:1, denom: 3)&lt;BR /&gt;- PFD0 (and DDR) frequency: 352800000 Hz (pfd: 20)&lt;/P&gt;&lt;P&gt;- NIC0 (and NIC1) frequency: 176400000 Hz&lt;BR /&gt;- LCDIF: 25200000 Hz (640x480@60Hz)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In addition of the display that doesn't work, I have also noticed another issue: the rpmsg regulator (used to control the PF1550) stops to work, which breaks many other peripherals such uSDHC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could help me to figure out what could be wrong?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For reference, I use the following kernel and bootloader:&lt;BR /&gt;git://source.codeaurora.org/external/imx/uboot-imx.git, rev rel_imx_4.14.78_1.0.0_ga&lt;BR /&gt;&lt;A class="unlinked"&gt;&lt;/A&gt;&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/" target="test_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/&lt;/A&gt;, rev rel_imx_4.14.78_1.0.0_ga&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alexandre&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 12 Feb 2019 14:53:00 GMT</pubDate>
    <dc:creator>alexandrebailon</dc:creator>
    <dc:date>2019-02-12T14:53:00Z</dc:date>
    <item>
      <title>iMX7ULP clocks issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX7ULP-clocks-issue/m-p/857093#M130996</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to implement support of &lt;A href="https://lore.kernel.org/lkml/20190122124204.GA26969@kroah.com/T/#u" title="https://lore.kernel.org/lkml/20190122124204.GA26969@kroah.com/T/#u"&gt;interconnect API&lt;/A&gt; on iMX7ULP (provides similar features as busfreq),&lt;/P&gt;&lt;P&gt;I would like to scale some clocks.&lt;/P&gt;&lt;P&gt;At runtime, the framework is going to scale nic0, nic1 and ddr clocks, so I must ensure that scaling one of these clocks won't cause any glitches.&lt;BR /&gt;The easiest way to do this it to re-parent the clocks which use nic0, nic1, or ddr clock for their peripheral clock.&lt;BR /&gt;Basically, I would like to use apll_pfd0, apll_pfd1 or apll_pfd2 as peripheral clock, and apll_pfd3 as source clock of ddr (and so, nic0 and nic1).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But, for some usecases, such as display, default pfd ferquencies are too high, and this can't be used as peripheral clock.&lt;BR /&gt;So, I tried to reconfigure the APLL frequency, and the PFDs to have a frequency low enough to be used by peripheral clocks, but since, the display is broken.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After many tests, it looks like that if the APLL frequency is too low (although this respects TRM recommendation),&lt;/P&gt;&lt;P&gt;then the lcdif / dsi doesn't work, although their clocks are exactly the same.&lt;/P&gt;&lt;P&gt;As example, this configuration (default) work:&lt;BR /&gt;- PLL frequency: 529200000 Hz (mult: 22, num:1, denom: 20)&lt;BR /&gt;- PFD0 (and DDR) frequency: 352800000 Hz (pfd: 27)&lt;/P&gt;&lt;P&gt;- NIC0 (and NIC1) frequency: 176400000 Hz&lt;BR /&gt;- LCDIF: 25200000 Hz (640x480@60Hz)&lt;/P&gt;&lt;P&gt;And this one doesn't:&lt;/P&gt;&lt;P&gt;- PLL frequency: 392000000 Hz (mult: 16, num:1, denom: 3)&lt;BR /&gt;- PFD0 (and DDR) frequency: 352800000 Hz (pfd: 20)&lt;/P&gt;&lt;P&gt;- NIC0 (and NIC1) frequency: 176400000 Hz&lt;BR /&gt;- LCDIF: 25200000 Hz (640x480@60Hz)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In addition of the display that doesn't work, I have also noticed another issue: the rpmsg regulator (used to control the PF1550) stops to work, which breaks many other peripherals such uSDHC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could help me to figure out what could be wrong?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For reference, I use the following kernel and bootloader:&lt;BR /&gt;git://source.codeaurora.org/external/imx/uboot-imx.git, rev rel_imx_4.14.78_1.0.0_ga&lt;BR /&gt;&lt;A class="unlinked"&gt;&lt;/A&gt;&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/" target="test_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/&lt;/A&gt;, rev rel_imx_4.14.78_1.0.0_ga&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alexandre&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2019 14:53:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX7ULP-clocks-issue/m-p/857093#M130996</guid>
      <dc:creator>alexandrebailon</dc:creator>
      <dc:date>2019-02-12T14:53:00Z</dc:date>
    </item>
    <item>
      <title>Re: iMX7ULP clocks issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX7ULP-clocks-issue/m-p/857094#M130997</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Alexandre&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can look at example of frequency change on&lt;/P&gt;&lt;P&gt;linux/drivers/cpufreq/imx7ulp-cpufreq.c&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/cpufreq/imx7ulp-cpufreq.c?h=imx_4.14.78_1.0.0_ga" title="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/cpufreq/imx7ulp-cpufreq.c?h=imx_4.14.78_1.0.0_ga"&gt;imx7ulp-cpufreq.c\cpufreq\drivers - linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;rpmsg driver&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/rpmsg/imx_rpmsg.c?h=imx_4.14.78_1.0.0_ga" title="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/rpmsg/imx_rpmsg.c?h=imx_4.14.78_1.0.0_ga"&gt;imx_rpmsg.c\rpmsg\drivers - linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Note, this part is not publicly released yet and can be supported with&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE" title="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE"&gt;NXP Professional Services | NXP&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Feb 2019 01:31:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX7ULP-clocks-issue/m-p/857094#M130997</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-02-13T01:31:30Z</dc:date>
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