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    <title>i.MX ProcessorsのトピックRPMSG-LITE Hangs in RL_ASSERT</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/RPMSG-LITE-Hangs-in-RL-ASSERT/m-p/854379#M130657</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everyone,&lt;BR /&gt;&amp;nbsp;In rpmsg_lite_release_rx_buffer() function there is a RL_ASSERT macro to expect a buffer pointer value inside a range, but...From the master side in Linux, these buffers are allocated using dma_alloc_coherent so a virtual address is expected which does not match what the RL_ASSERT macro expects, therefore my program hangs there.&lt;BR /&gt; I'm using a iMX7D with these configuration for the rpmsg:&lt;BR /&gt; DT:&lt;BR /&gt; &amp;amp;rpmsg{&lt;BR /&gt; vdev-nums = &amp;lt;1&amp;gt;;&lt;BR /&gt; reg = &amp;lt;0xbfff0000 0x80000&amp;gt;;&lt;BR /&gt; status = "okay";&lt;BR /&gt; };&lt;BR /&gt; RPMSG-LITE&lt;BR /&gt; #define BOARD_SHARED_MEMORY_BASE (void *)0xBFFF0000&lt;BR /&gt; #define RL_BUFFER_COUNT (256)&lt;BR /&gt; #define RL_BUFFER_PAYLOAD_SIZE (496)&lt;/P&gt;&lt;P&gt;With these parameters, when i receive something from the master side, the rx buffer addr is at 0xAA... and RL_ASSERT triggers.&lt;BR /&gt; Any ideas? Thanks in advance&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 04 Jan 2019 21:24:45 GMT</pubDate>
    <dc:creator>georgefff</dc:creator>
    <dc:date>2019-01-04T21:24:45Z</dc:date>
    <item>
      <title>RPMSG-LITE Hangs in RL_ASSERT</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RPMSG-LITE-Hangs-in-RL-ASSERT/m-p/854379#M130657</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everyone,&lt;BR /&gt;&amp;nbsp;In rpmsg_lite_release_rx_buffer() function there is a RL_ASSERT macro to expect a buffer pointer value inside a range, but...From the master side in Linux, these buffers are allocated using dma_alloc_coherent so a virtual address is expected which does not match what the RL_ASSERT macro expects, therefore my program hangs there.&lt;BR /&gt; I'm using a iMX7D with these configuration for the rpmsg:&lt;BR /&gt; DT:&lt;BR /&gt; &amp;amp;rpmsg{&lt;BR /&gt; vdev-nums = &amp;lt;1&amp;gt;;&lt;BR /&gt; reg = &amp;lt;0xbfff0000 0x80000&amp;gt;;&lt;BR /&gt; status = "okay";&lt;BR /&gt; };&lt;BR /&gt; RPMSG-LITE&lt;BR /&gt; #define BOARD_SHARED_MEMORY_BASE (void *)0xBFFF0000&lt;BR /&gt; #define RL_BUFFER_COUNT (256)&lt;BR /&gt; #define RL_BUFFER_PAYLOAD_SIZE (496)&lt;/P&gt;&lt;P&gt;With these parameters, when i receive something from the master side, the rx buffer addr is at 0xAA... and RL_ASSERT triggers.&lt;BR /&gt; Any ideas? Thanks in advance&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Jan 2019 21:24:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RPMSG-LITE-Hangs-in-RL-ASSERT/m-p/854379#M130657</guid>
      <dc:creator>georgefff</dc:creator>
      <dc:date>2019-01-04T21:24:45Z</dc:date>
    </item>
    <item>
      <title>Re: RPMSG-LITE Hangs in RL_ASSERT</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RPMSG-LITE-Hangs-in-RL-ASSERT/m-p/854380#M130658</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi George&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for rpmsg porting may be useful to check i.MX6SX M4 MPU Settings For RPMSG document&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" class="link-titled" href="https://community.nxp.com/servlet/JiveServlet/download/335198-15-431136/i.MX6SX_M4_MPU_Settings_For_RPMSG_08102018.pdf" title="https://community.nxp.com/servlet/JiveServlet/download/335198-15-431136/i.MX6SX_M4_MPU_Settings_For_RPMSG_08102018.pdf"&gt;https://community.nxp.com/servlet/JiveServlet/download/335198-15-431136/i.MX6SX_M4_MPU_Settings_For_RPMSG_08102018.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Jan 2019 07:32:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RPMSG-LITE-Hangs-in-RL-ASSERT/m-p/854380#M130658</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-01-16T07:32:36Z</dc:date>
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