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    <title>topic Re: Max Baud Rate and Transfer size for SPI SDMA Transfers in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853987#M130611</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Which IDE are you using?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I used IAR and the SDK worked without any problem. The test passes with all the baud rates and using different transfer sizes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 25 Jun 2019 22:50:10 GMT</pubDate>
    <dc:creator>diegoadrian</dc:creator>
    <dc:date>2019-06-25T22:50:10Z</dc:date>
    <item>
      <title>Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853981#M130605</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am using the SPI SDMA to transfer information. I would like to know if there is a limit on the baud rate when using this. My transfers are failing when I try to do a larger transfer at a high baud rate. Is there a Max baud rate for the spi sdma based transfer? I am seeing this on the Cortex M4 for the IMX8MM and IMX8MQ. Is anyone else seeing this? Below are my results, I am using a loopback functionality to test my results.&amp;nbsp;Any suggestion on what I can do to get a faster rate working with a larger transfer size.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Size&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Rate&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Result&lt;/P&gt;&lt;P&gt;64&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;500k Hz&amp;nbsp;&amp;nbsp;&amp;nbsp;Pass&lt;/P&gt;&lt;P&gt;256&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;500k Hz&amp;nbsp;&amp;nbsp;&amp;nbsp;Pass&lt;/P&gt;&lt;P&gt;64&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10MHz&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Intermittent Pass/Fail&lt;/P&gt;&lt;P&gt;128&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10MHz&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Fail&lt;/P&gt;&lt;P&gt;256&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10M Hz&amp;nbsp;&amp;nbsp;&amp;nbsp; Fail&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Apr 2019 18:31:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853981#M130605</guid>
      <dc:creator>vaparikh</dc:creator>
      <dc:date>2019-04-09T18:31:40Z</dc:date>
    </item>
    <item>
      <title>Re: Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853982#M130606</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you please send me how are you testing this problem?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I need to see how to reproduce it on my board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Apr 2019 22:13:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853982#M130606</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-04-23T22:13:30Z</dc:date>
    </item>
    <item>
      <title>Re: Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853983#M130607</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am using the SPI SDMA Loopback example and changing the values for the baud rate and transfer size.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When I use a higher baud rate and high packet size I see that I don't get the callback. However, for the same baud rate if I use a lower packet size I get a read callback. Are there any restrictions on the baud rate or packet size when using the SPI SDMA interface. I want to use a 10 Mhz rate and read a 500 byte packet size. At present, I can read 500 bytes at 6 Mz but anything above that is failing.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 May 2019 20:07:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853983#M130607</guid>
      <dc:creator>vaparikh</dc:creator>
      <dc:date>2019-05-09T20:07:44Z</dc:date>
    </item>
    <item>
      <title>Re: Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853984#M130608</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I apologize for the delay.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you are still having a problem, can you please confirm if you are using the ecspi example that we had in our SDK for the i.MX8MQ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Jun 2019 17:26:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853984#M130608</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-06-07T17:26:20Z</dc:date>
    </item>
    <item>
      <title>Re: Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853985#M130609</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, I am using the ecspi example in your SDK and changed the baud rate.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Jun 2019 17:48:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853985#M130609</guid>
      <dc:creator>vaparikh</dc:creator>
      <dc:date>2019-06-07T17:48:13Z</dc:date>
    </item>
    <item>
      <title>Re: Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853986#M130610</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Let me reproduce this on my board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hopefully, I will give you an update during the next week.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Jun 2019 20:38:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853986#M130610</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-06-21T20:38:40Z</dc:date>
    </item>
    <item>
      <title>Re: Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853987#M130611</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Which IDE are you using?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I used IAR and the SDK worked without any problem. The test passes with all the baud rates and using different transfer sizes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Jun 2019 22:50:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853987#M130611</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-06-25T22:50:10Z</dc:date>
    </item>
    <item>
      <title>Re: Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853988#M130612</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Diego! I am using Ozone. Do you think that will make a difference? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Jun 2019 22:53:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853988#M130612</guid>
      <dc:creator>vaparikh</dc:creator>
      <dc:date>2019-06-25T22:53:36Z</dc:date>
    </item>
    <item>
      <title>Re: Max Baud Rate and Transfer size for SPI SDMA Transfers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853989#M130613</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We do recommend to use the SDK with the IDEs that are by default in our SDK builder. The SDK was compiled and tested with&amp;nbsp;IAR Embedded Workbench for Arm version 8.32.2 and&amp;nbsp;Makefiles support with GCC revision 7-2018-q2-update from Arm Embedded.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I suggest you use IAR if it is possible for you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diego.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Jun 2019 22:47:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Max-Baud-Rate-and-Transfer-size-for-SPI-SDMA-Transfers/m-p/853989#M130613</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2019-06-26T22:47:28Z</dc:date>
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