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    <title>i.MX Processors中的主题 Re: IMX7D PCIE Control Register Access Failure</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847516#M129757</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-size: 14px;"&gt;Hi Igor,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-size: 14px;"&gt;Thanks for your reply. The register value is 0x0 in uboot and 0x3 in kernel. The clock is enabled in kernel.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-size: 14px;"&gt;I am going to check the PCIE voltage rail next.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-size: 14px;"&gt;Chris&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 03 Jan 2019 08:51:24 GMT</pubDate>
    <dc:creator>christsang</dc:creator>
    <dc:date>2019-01-03T08:51:24Z</dc:date>
    <item>
      <title>IMX7D PCIE Control Register Access Failure</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847514#M129755</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am working on PCIE support on my custom board. I raised a question before&amp;nbsp;&lt;A href="https://community.nxp.com/thread/490102" rel="nofollow noopener noreferrer" target="_blank"&gt;IMX7D PCIE Support&lt;/A&gt;&amp;nbsp;. But this time I am going to provide more details.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As I am going to enable PCIE support for IMX7D, I have enabled following kernel options.&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;CONFIG_PCI=y
CONFIG_PCI_MSI=y
CONFIG_PCI_IMX6=y

CONFIG_BLK_DEV_NVME=y‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;After that I have also enable the PCIE in device tree.&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;&amp;amp;pcie {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_pcie&amp;gt;;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; reset-gpio = &amp;lt;&amp;amp;gpio1 13 GPIO_ACTIVE_LOW&amp;gt;;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; disable-gpio = &amp;lt;&amp;amp;gpio1 12 GPIO_ACTIVE_LOW&amp;gt;;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";
};‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After that, the kernel stuck at&lt;/P&gt;&lt;P&gt;Starting kernel ...&lt;/P&gt;&lt;P&gt;Uncompressing Linux... done, booting the kernel.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I finally trace the cause is here in pcie-designware.c&lt;/P&gt;&lt;PRE class="language-c line-numbers"&gt;&lt;CODE&gt;&lt;SPAN class="keyword token"&gt;void&lt;/SPAN&gt; &lt;SPAN class="token function"&gt;dw_pcie_setup_rc&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;&lt;SPAN class="keyword token"&gt;struct&lt;/SPAN&gt; pcie_port &lt;SPAN class="operator token"&gt;*&lt;/SPAN&gt;pp&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;
&lt;SPAN class="punctuation token"&gt;{&lt;/SPAN&gt;
 &lt;SPAN class="keyword token"&gt;return&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
 u32 val&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
&lt;SPAN class="comment token"&gt;/* set the number of lanes */&lt;/SPAN&gt;
 val &lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; &lt;SPAN class="token function"&gt;dw_pcie_readl_rc&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;pp&lt;SPAN class="punctuation token"&gt;,&lt;/SPAN&gt; PCIE_PORT_LINK_CONTROL&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
 val &lt;SPAN class="operator token"&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; &lt;SPAN class="operator token"&gt;~&lt;/SPAN&gt;PORT_LINK_MODE_MASK&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
 &lt;SPAN class="keyword token"&gt;switch&lt;/SPAN&gt; &lt;SPAN class="punctuation token"&gt;(&lt;/SPAN&gt;pp&lt;SPAN class="operator token"&gt;-&amp;gt;&lt;/SPAN&gt;lanes&lt;SPAN class="punctuation token"&gt;)&lt;/SPAN&gt; &lt;SPAN class="punctuation token"&gt;{&lt;/SPAN&gt;
 &lt;SPAN class="keyword token"&gt;case&lt;/SPAN&gt; &lt;SPAN class="number token"&gt;1&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;:&lt;/SPAN&gt;
 val &lt;SPAN class="operator token"&gt;|&lt;/SPAN&gt;&lt;SPAN class="operator token"&gt;=&lt;/SPAN&gt; PORT_LINK_MODE_1_LANES&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;
 &lt;SPAN class="keyword token"&gt;break&lt;/SPAN&gt;&lt;SPAN class="punctuation token"&gt;;&lt;/SPAN&gt;‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;The dw_pcie_readl_rc() function cannot proceed and the kernel fails to respond.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This issue only happens on my custom board but not on IMX7D sabre board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried to manually read the register instead, in both kernel and uboot. Both of them fail to respond and keep stuck at that moment. Even CTRL-C cannot escape that condition&lt;/P&gt;&lt;P&gt;Kernel:&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;memtool md -l 0x33800710 1‍‍‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;Uboot&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;md.l 0x33800710 1‍‍‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This register seems to be able to access using certain method.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please advise. Thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Chris Tsang&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Jan 2019 04:31:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847514#M129755</guid>
      <dc:creator>christsang</dc:creator>
      <dc:date>2019-01-03T04:31:00Z</dc:date>
    </item>
    <item>
      <title>Re: IMX7D PCIE Control Register Access Failure</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847515#M129756</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Chris&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can check if pcie clocks are enabled in CCM_CCGR96 register&lt;/P&gt;&lt;P&gt;(Table 5-19. CCGR Mapping Table i.MX7D Reference Manual) and PCIe&lt;/P&gt;&lt;P&gt;voltage rails using Hardware Development Guide for i.MX7Dual and 7Solo Applications Processors &lt;BR /&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Ffiles%2F32bit%2Fdoc%2Fuser_guide%2FIMX7DSHDG.pdf" rel="nofollow" target="_blank"&gt;http://www.nxp.com/files/32bit/doc/user_guide/IMX7DSHDG.pdf&lt;/A&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Try with nxp linux :&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/?h=imx_4.9.88_2.0.0_ga" title="https://source.codeaurora.org/external/imx/linux-imx/tree/?h=imx_4.9.88_2.0.0_ga"&gt;linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Jan 2019 08:31:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847515#M129756</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-01-03T08:31:26Z</dc:date>
    </item>
    <item>
      <title>Re: IMX7D PCIE Control Register Access Failure</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847516#M129757</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-size: 14px;"&gt;Hi Igor,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-size: 14px;"&gt;Thanks for your reply. The register value is 0x0 in uboot and 0x3 in kernel. The clock is enabled in kernel.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-size: 14px;"&gt;I am going to check the PCIE voltage rail next.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-size: 14px;"&gt;Chris&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Jan 2019 08:51:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847516#M129757</guid>
      <dc:creator>christsang</dc:creator>
      <dc:date>2019-01-03T08:51:24Z</dc:date>
    </item>
    <item>
      <title>Re: IMX7D PCIE Control Register Access Failure</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847517#M129758</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This issue is due to the PCIE_VP and PCIE_VPH connections. They are all connected to ground.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Jan 2019 09:22:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX7D-PCIE-Control-Register-Access-Failure/m-p/847517#M129758</guid>
      <dc:creator>christsang</dc:creator>
      <dc:date>2019-01-03T09:22:34Z</dc:date>
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