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    <title>topic Re: imx6q ssi in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846828#M129671</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi，&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;igor：&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Connect to imx6q like this? I don't seem to see a Linux manual about ALSA.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/62792iC884367319B8544C/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;In addition, now I don't know what external audio codec chip (like I don't know is wm8962), only know that three signal lines (BCLK, LRCLK, ADCDAT) are connected to imx6Q, in this case, if I operate the register directly, Can I read the data in the receive buffer of ssi?&lt;BR /&gt;I saw the imx6q chip manual saying that it is possible to send port 3 (AUD3) data to port 1 (ssi1) on the audmux module. Is this feasible?&lt;BR /&gt;Thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 14 Aug 2018 02:03:44 GMT</pubDate>
    <dc:creator>hsl</dc:creator>
    <dc:date>2018-08-14T02:03:44Z</dc:date>
    <item>
      <title>imx6q ssi</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846826#M129669</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi，everyone：&lt;/P&gt;&lt;P&gt;What if I use imx6q to read the I2S signal?&lt;BR /&gt;That is, the external input i2s signal, and the clock is also provided externally&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Aug 2018 03:14:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846826#M129669</guid>
      <dc:creator>hsl</dc:creator>
      <dc:date>2018-08-13T03:14:59Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q ssi</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846827#M129670</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi H&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes i.MX6Q can read the I2S signal, please refer to WM8962 (it send/receive i2s) on&lt;/P&gt;&lt;P&gt;Sabre SD schematic spf-27392 p.10 Schematics (1)&lt;BR /&gt;i.MX6_SABRE_SDP_DESIGNFILES&lt;BR /&gt;&lt;A href="http://www.nxp.com/products/software-and-tools/hardware-development-tools/sabre-development-system/sabre-platform-for-smart-devices-based-on-the-i.mx-6-series:RDIMX6SABREPLAT?fpsp=1&amp;amp;tab=Design_Tools_Tab"&gt;http://www.nxp.com/products/software-and-tools/hardware-development-tools/sabre-development-system/sabre-platform-for-smart-devices-based-on-the-i.mx-6-series:RDIMX6SABREPLAT?fpsp=1&amp;amp;tab=Design_Tools_Tab&lt;/A&gt;&lt;/P&gt;&lt;P&gt;and its driver in attached Linux Manual Chapter 28 Advanced Linux Sound Architecture (ALSA) System&lt;BR /&gt;on a Chip (ASoC) Sound Driver&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Aug 2018 00:26:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846827#M129670</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-08-14T00:26:44Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q ssi</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846828#M129671</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi，&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;igor：&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Connect to imx6q like this? I don't seem to see a Linux manual about ALSA.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/62792iC884367319B8544C/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;In addition, now I don't know what external audio codec chip (like I don't know is wm8962), only know that three signal lines (BCLK, LRCLK, ADCDAT) are connected to imx6Q, in this case, if I operate the register directly, Can I read the data in the receive buffer of ssi?&lt;BR /&gt;I saw the imx6q chip manual saying that it is possible to send port 3 (AUD3) data to port 1 (ssi1) on the audmux module. Is this feasible?&lt;BR /&gt;Thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Aug 2018 02:03:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846828#M129671</guid>
      <dc:creator>hsl</dc:creator>
      <dc:date>2018-08-14T02:03:44Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q ssi</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846829#M129672</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;yes in general one can read the data in the receive buffer of ssi,&lt;/P&gt;&lt;P&gt;more simple examples can be found in baremetal SDK (zip can be found on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/432859"&gt;SMP Enable in IMX6&lt;/A&gt;)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Aug 2018 06:31:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846829#M129672</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-08-14T06:31:10Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q ssi</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846830#M129673</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi，I&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;gor&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Not on bare metal, I mean registering a character device driver through memory address mapping, directly configuring the registers, and then reading the ssi registers, like this:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Address mapping：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/63927i6B93E0FBBBE802EB/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Register configuration：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/63970iC3CF3263B883C3BB/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;read&amp;nbsp;data：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/63188iA63783493BCA882F/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is this feasible?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Aug 2018 07:22:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-ssi/m-p/846830#M129673</guid>
      <dc:creator>hsl</dc:creator>
      <dc:date>2018-08-14T07:22:50Z</dc:date>
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