How to compare read and write delay calibrations to pinpoint memory issue ?

peteramond — Fri, 10 Aug 2018 11:16:37 GMT

Hi All,

In the document Freescale i.MX6 DRAM Port Application Guide – DDR3 we can see the sample read and write delay calibrations in section 3.1.2

From following write level calibration of 2 boards we can see from the red highlighted lines Board 1 has got 0x11111111 too early than Board 2.

1) What can we figure from this ? If 0 represent pass values and 1 represent fail; according to user manual why some results are like 0x10111111 ?

2) If wider the 0 window, it represent more pass results for the ddr. Is that good or bad ?

3) Why it is showing at top and bottom half all 1 ? Is that mean read or write fails ? If at the very bottom result include 0 result what can we say about that byte lane ?

4) Can we get any failures of byte lane of the memory from this results ?

Regards,

Peter.

Board 1 (Working Board)

ABS_OFFSET=0x00000000 result[00]=0x11111111
ABS_OFFSET=0x04040404 result[01]=0x10111111
ABS_OFFSET=0x08080808 result[02]=0x10110111
ABS_OFFSET=0x0C0C0C0C result[03]=0x10110010
ABS_OFFSET=0x10101010 result[04]=0x10100010
ABS_OFFSET=0x14141414 result[05]=0x00000000
ABS_OFFSET=0x18181818 result[06]=0x00000000
ABS_OFFSET=0x1C1C1C1C result[07]=0x00000000
ABS_OFFSET=0x20202020 result[08]=0x00000000
ABS_OFFSET=0x24242424 result[09]=0x00000000
ABS_OFFSET=0x28282828 result[0A]=0x00000000
ABS_OFFSET=0x2C2C2C2C result[0B]=0x00000000
ABS_OFFSET=0x30303030 result[0C]=0x00000000
ABS_OFFSET=0x34343434 result[0D]=0x00000000
ABS_OFFSET=0x38383838 result[0E]=0x00000000
ABS_OFFSET=0x3C3C3C3C result[0F]=0x00000000
ABS_OFFSET=0x40404040 result[10]=0x00000000
ABS_OFFSET=0x44444444 result[11]=0x00000000
ABS_OFFSET=0x48484848 result[12]=0x00000000
ABS_OFFSET=0x4C4C4C4C result[13]=0x00000000
ABS_OFFSET=0x50505050 result[14]=0x00000000
ABS_OFFSET=0x54545454 result[15]=0x00000000
ABS_OFFSET=0x58585858 result[16]=0x00000000
ABS_OFFSET=0x5C5C5C5C result[17]=0x00000000
ABS_OFFSET=0x60606060 result[18]=0x01000000
ABS_OFFSET=0x64646464 result[19]=0x01000000
ABS_OFFSET=0x68686868 result[1A]=0x01011110
ABS_OFFSET=0x6C6C6C6C result[1B]=0x01111111
ABS_OFFSET=0x70707070 result[1C]=0x11111111
ABS_OFFSET=0x74747474 result[1D]=0x11111111
ABS_OFFSET=0x78787878 result[1E]=0x11111111
ABS_OFFSET=0x7C7C7C7C result[1F]=0x11111111

Board 2 (Faulty board)

ABS_OFFSET=0x00000000 result[00]=0x11111111
ABS_OFFSET=0x04040404 result[01]=0x11111111
ABS_OFFSET=0x08080808 result[02]=0x11110111
ABS_OFFSET=0x0C0C0C0C result[03]=0x10100010
ABS_OFFSET=0x10101010 result[04]=0x10100010
ABS_OFFSET=0x14141414 result[05]=0x10100000
ABS_OFFSET=0x18181818 result[06]=0x00000000
ABS_OFFSET=0x1C1C1C1C result[07]=0x00000000
ABS_OFFSET=0x20202020 result[08]=0x00000000
ABS_OFFSET=0x24242424 result[09]=0x00000000
ABS_OFFSET=0x28282828 result[0A]=0x00000000
ABS_OFFSET=0x2C2C2C2C result[0B]=0x00000000
ABS_OFFSET=0x30303030 result[0C]=0x00000000
ABS_OFFSET=0x34343434 result[0D]=0x00000000
ABS_OFFSET=0x38383838 result[0E]=0x00000000
ABS_OFFSET=0x3C3C3C3C result[0F]=0x00000000
ABS_OFFSET=0x40404040 result[10]=0x00000000
ABS_OFFSET=0x44444444 result[11]=0x00000000
ABS_OFFSET=0x48484848 result[12]=0x00000000
ABS_OFFSET=0x4C4C4C4C result[13]=0x00000000
ABS_OFFSET=0x50505050 result[14]=0x00000000
ABS_OFFSET=0x54545454 result[15]=0x00000000
ABS_OFFSET=0x58585858 result[16]=0x00000000
ABS_OFFSET=0x5C5C5C5C result[17]=0x00000000
ABS_OFFSET=0x60606060 result[18]=0x00000000
ABS_OFFSET=0x64646464 result[19]=0x00000000
ABS_OFFSET=0x68686868 result[1A]=0x00000000
ABS_OFFSET=0x6C6C6C6C result[1B]=0x01001000
ABS_OFFSET=0x70707070 result[1C]=0x01001111
ABS_OFFSET=0x74747474 result[1D]=0x01111111
ABS_OFFSET=0x78787878 result[1E]=0x01111111
ABS_OFFSET=0x7C7C7C7C result[1F]=0x11111111

Re: How to compare read and write delay calibrations to pinpoint memory issue ?

igorpadykov — Mon, 13 Aug 2018 02:22:22 GMT

Hi Peter

results 0x10111111 are high and low failure points as described in

sect.13 Read DQS Delay Calibration AN4467 i.MX6 Series DDR Calibration

https://www.nxp.com/docs/en/application-note/AN4467.pdf

>2) If wider the 0 window, it represent more pass results for the ddr. Is that good or bad ?

good

>4) Can we get any failures of byte lane of the memory from this results ?

these results seem as good, so from them there is no way to tell reason for linux failures.

Best regards
igor
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topic How to compare read and write delay calibrations to pinpoint memory issue ? in i.MX Processors

How to compare read and write delay calibrations to pinpoint memory issue ?

Re: How to compare read and write delay calibrations to pinpoint memory issue ?