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    <title>topic iMX6 RGMII TskewT impact on Receive side in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-RGMII-TskewT-impact-on-Receive-side/m-p/841207#M129024</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Between the iMX6 Dual Lite and iMX6 Quad datasheet, in the RGMII Signal Switching Specifications, the TskewT parameter change&amp;nbsp;from -500ps / +500ps (Dual Lite) to -100ps / +900ps (Quad).&lt;/P&gt;&lt;P&gt;This change will obviously have an impact on the RGMII Transmit side. But will it have an impact as well on the Receive side ? Figure 48 from Quad Datasheet (or Figure 53 from Dual Lite Datasheet) seems to show an impact on the receive side.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Xavier&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 18 Sep 2018 18:56:22 GMT</pubDate>
    <dc:creator>xdumoulin</dc:creator>
    <dc:date>2018-09-18T18:56:22Z</dc:date>
    <item>
      <title>iMX6 RGMII TskewT impact on Receive side</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-RGMII-TskewT-impact-on-Receive-side/m-p/841207#M129024</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Between the iMX6 Dual Lite and iMX6 Quad datasheet, in the RGMII Signal Switching Specifications, the TskewT parameter change&amp;nbsp;from -500ps / +500ps (Dual Lite) to -100ps / +900ps (Quad).&lt;/P&gt;&lt;P&gt;This change will obviously have an impact on the RGMII Transmit side. But will it have an impact as well on the Receive side ? Figure 48 from Quad Datasheet (or Figure 53 from Dual Lite Datasheet) seems to show an impact on the receive side.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Xavier&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Sep 2018 18:56:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6-RGMII-TskewT-impact-on-Receive-side/m-p/841207#M129024</guid>
      <dc:creator>xdumoulin</dc:creator>
      <dc:date>2018-09-18T18:56:22Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6 RGMII TskewT impact on Receive side</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-RGMII-TskewT-impact-on-Receive-side/m-p/841208#M129025</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Xavier&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;TskewR is the same for both i.MX6Q and DualLite according to&lt;/P&gt;&lt;P&gt;Table&amp;nbsp; RGMII Signal Switching Specifications&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/data-sheet/IMX6DQCEC.pdf" title="https://www.nxp.com/docs/en/data-sheet/IMX6DQCEC.pdf"&gt;https://www.nxp.com/docs/en/data-sheet/IMX6DQCEC.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf" title="https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf"&gt;https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Difference in TskewTmay be explained by different transmit path as silicon&lt;/P&gt;&lt;P&gt;die is different for both chips. Receiver just latches data in buffer and there is no difference.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Sep 2018 00:40:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6-RGMII-TskewT-impact-on-Receive-side/m-p/841208#M129025</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-09-19T00:40:25Z</dc:date>
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