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    <title>topic how to use externally generated MCLK with SAI in master mode on i.MX7D? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833987#M128071</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am working with the iMX7D SABRE development board and am trying to connect an audio DAC to SAI2 but am confused about how to configure the clocking/pinmux/etc to get the behavior I desire.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using an external oscillator to generate&amp;nbsp;the master clock (MCLK) which is connected to the DAC and to an input on the iMX7. &amp;nbsp;It's not clear to me how to route this MCLK&amp;nbsp;to the SAI2 block. &amp;nbsp;I want the iMX7D to act as master with respect to the DAC - so the transmit bit clock and frame sync signals are outputs from the iMX7 to the DAC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What pin(s) on the iMX7 can I use to route this externally generated MCLK to SAI2 and how should I configure the clocking infrastructure (CCM, etc), device tree, and SAI2 control registers to achieve the desired behavior?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can I use the SAI1_MCLK pad as an input? &amp;nbsp;Or do I have to use the CCM_EXT_CLK2 clock input, connect this to the AUDIO_PLL in bypass mode and use that as input to SAI2? &amp;nbsp;Or something else??&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have the SAI control registers set to generate transmit bit clock and frame sync (master mode), but I'm not sure how I should set the MSEL (MCLK select) bits and where to connect the externally generated MCLK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It is not clear to me from reading the available documentation (chapter 5 and section 13.8 in the iMX7D applications processor reference manual) how to achieve this goal...&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance for any help!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Rimas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 19 Jul 2018 20:18:38 GMT</pubDate>
    <dc:creator>rimas</dc:creator>
    <dc:date>2018-07-19T20:18:38Z</dc:date>
    <item>
      <title>how to use externally generated MCLK with SAI in master mode on i.MX7D?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833987#M128071</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am working with the iMX7D SABRE development board and am trying to connect an audio DAC to SAI2 but am confused about how to configure the clocking/pinmux/etc to get the behavior I desire.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using an external oscillator to generate&amp;nbsp;the master clock (MCLK) which is connected to the DAC and to an input on the iMX7. &amp;nbsp;It's not clear to me how to route this MCLK&amp;nbsp;to the SAI2 block. &amp;nbsp;I want the iMX7D to act as master with respect to the DAC - so the transmit bit clock and frame sync signals are outputs from the iMX7 to the DAC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What pin(s) on the iMX7 can I use to route this externally generated MCLK to SAI2 and how should I configure the clocking infrastructure (CCM, etc), device tree, and SAI2 control registers to achieve the desired behavior?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can I use the SAI1_MCLK pad as an input? &amp;nbsp;Or do I have to use the CCM_EXT_CLK2 clock input, connect this to the AUDIO_PLL in bypass mode and use that as input to SAI2? &amp;nbsp;Or something else??&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have the SAI control registers set to generate transmit bit clock and frame sync (master mode), but I'm not sure how I should set the MSEL (MCLK select) bits and where to connect the externally generated MCLK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It is not clear to me from reading the available documentation (chapter 5 and section 13.8 in the iMX7D applications processor reference manual) how to achieve this goal...&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance for any help!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Rimas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 19 Jul 2018 20:18:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833987#M128071</guid>
      <dc:creator>rimas</dc:creator>
      <dc:date>2018-07-19T20:18:38Z</dc:date>
    </item>
    <item>
      <title>Re: how to use externally generated MCLK with SAI in master mode on i.MX7D?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833988#M128072</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rimas&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you are right that one can use the CCM_EXT_CLK2 clock input, connecting AUDIO_PLL in bypass &lt;BR /&gt;mode and use that as input to SAI2, SAI1_MCLK pad can not be used as input. In i.MX7D MSEL &lt;BR /&gt;(MCLK select) has only one option, there are no ways to select others.&lt;/P&gt;&lt;P&gt;Unfortunately I am not aware of additional documenatation except Reference Manual, below links may be helpful&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/462742"&gt;https://community.nxp.com/thread/462742&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/439237"&gt;I2S1 Slave configuration on iMX7D&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 21 Jul 2018 00:00:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833988#M128072</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-07-21T00:00:29Z</dc:date>
    </item>
    <item>
      <title>Re: how to use externally generated MCLK with SAI in master mode on i.MX7D?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833989#M128073</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your help. &amp;nbsp;I have a few more questions regarding the clocking of the SAI modules I'm hoping you can answer:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. &amp;nbsp;What is the difference between the SAI{1,2,3}_CLK_ROOT and AUDIO_MCLK_CLK_ROOT clock signals? &amp;nbsp;How are they used within the SAI blocks? &amp;nbsp;I'm guessing that AUDIO_MCLK_CLK_ROOT is shared between the 3 instances of the SAI block, but what exactly is it used for? &amp;nbsp;What is the relationship between AUDIO_MCLK_CLK_ROOT and SAI{1,2,3}_CLOCK_ROOT?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. &amp;nbsp;You wrote&amp;nbsp;that in the i.MX7D there is only one option (so no options?) for MSEL. &amp;nbsp;In the i.MX7 reference manual, there are two MSEL bits defined and there are 4 values defined for it. &amp;nbsp;Are you saying that the reference manual is wrong and there is actually only availabe master clock (for all 3 SAI instances)? &amp;nbsp;If this is true, which clock is used as the master clock and how should the MSEL bits be set?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Rimas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Jul 2018 19:15:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833989#M128073</guid>
      <dc:creator>rimas</dc:creator>
      <dc:date>2018-07-23T19:15:45Z</dc:date>
    </item>
    <item>
      <title>Re: how to use externally generated MCLK with SAI in master mode on i.MX7D?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833990#M128074</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rimas&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. for SAI_CLK_ROOT and AUDIO_MCLK_CLK_ROOT clock signals one can look at&lt;/P&gt;&lt;P&gt;sect.Clock Control Module (CCM) i.MX7D Reference Manual&lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.nxp.com/files/32bit/doc/ref_manual/IMX7DRM.pdf"&gt;http://cache.nxp.com/files/32bit/doc/ref_manual/IMX7DRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;2. only one MSEL option is supported on i.MX7D, it is used in BSP.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 24 Jul 2018 09:05:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833990#M128074</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-07-24T09:05:53Z</dc:date>
    </item>
    <item>
      <title>Re: how to use externally generated MCLK with SAI in master mode on i.MX7D?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833991#M128075</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/igorpadykov"&gt;igorpadykov&lt;/A&gt;‌ You said:&lt;/P&gt;&lt;P&gt;"&lt;SPAN style="display: inline !important; float: none; background-color: transparent; color: #51626f; font-family: arial,helvetica,'helvetica neue',verdana,sans-serif; font-size: 15px; font-style: normal; font-variant: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-decoration: none; text-indent: 0px; text-transform: none; -webkit-text-stroke-width: 0px; white-space: normal; word-spacing: 0px;"&gt;SAI1_MCLK pad can not be used as input.&lt;/SPAN&gt;"&lt;/P&gt;&lt;P&gt;Can SAI2_MCLK or SAI3_MCLK be used as inputs? The Reference Manual states:&lt;/P&gt;&lt;P&gt;&amp;gt;&amp;gt; Audio Master Clock. The master clock is an input when externally generated and an output when internally generated.&lt;/P&gt;&lt;P&gt;Is the manual wrong?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Feb 2019 17:14:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833991#M128075</guid>
      <dc:creator>kwelsh</dc:creator>
      <dc:date>2019-02-01T17:14:32Z</dc:date>
    </item>
    <item>
      <title>Re: how to use externally generated MCLK with SAI in master mode on i.MX7D?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833992#M128076</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt;Can SAI2_MCLK or SAI3_MCLK be used as inputs?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I checked internally, from my findings it can not.&lt;/P&gt;&lt;P&gt;In i.MX7D MSEL (MCLK select) has only one option, there are no ways to select others.&lt;/P&gt;&lt;P&gt;In general it can be input with other MSEL settings.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 02 Feb 2019 03:27:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-use-externally-generated-MCLK-with-SAI-in-master-mode-on/m-p/833992#M128076</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-02-02T03:27:32Z</dc:date>
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