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    <title>i.MX ProcessorsのトピックRe: IMX6D DDR CLOCK</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831200#M127689</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Yes, it is possible to use both DRAM clocks.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 29 Dec 2018 10:57:04 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2018-12-29T10:57:04Z</dc:date>
    <item>
      <title>IMX6D DDR CLOCK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831199#M127688</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am designing an IMX6D board refereced from the IMX6Q evaluation kit. There are two clocks and four DDR chips in the evaluation board where one clock serves two DDR chips. Here I use two DDR chips in the IMX6D board. Can I use both of the clocks? One clock connects one DDR chip. Thanks.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Dec 2018 01:54:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831199#M127688</guid>
      <dc:creator>jfsong1</dc:creator>
      <dc:date>2018-12-25T01:54:01Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6D DDR CLOCK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831200#M127689</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Yes, it is possible to use both DRAM clocks.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 29 Dec 2018 10:57:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831200#M127689</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-12-29T10:57:04Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6D DDR CLOCK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831201#M127690</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Yuri&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;The evaluation board contains four ddr chips of 64bits, but my own board contains two ddr chips of 32bits.&amp;nbsp;When I use both DRAM clocks for two ddr chips, should I make some special hardware and software modifications according to the evaluation board? What should I do in hardware especiallly ? For example, the two clocks should be configured&amp;nbsp; to use, or nothing should be done and it's ready to use. Below is&amp;nbsp;my two ddr clocks connection reference. Is that right?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="11.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/71481iF6BF3F8FA69EDEE5/image-size/large?v=v2&amp;amp;px=999" role="button" title="11.JPG" alt="11.JPG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 05 Jan 2019 03:28:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831201#M127690</guid>
      <dc:creator>jfsong1</dc:creator>
      <dc:date>2019-01-05T03:28:35Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6D DDR CLOCK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831202#M127691</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; by default the both clocks are the same, therefore just use board design rules for DRAM &lt;BR /&gt;clocks and other signals.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Jan 2019 08:34:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6D-DDR-CLOCK/m-p/831202#M127691</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2019-01-08T08:34:22Z</dc:date>
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