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    <title>i.MX ProcessorsのトピックRe: i.MX8M DRAM Controller Data width</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-DRAM-Controller-Data-width/m-p/830656#M127638</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dixit&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Can I make use of these signals to connect four numbers of&amp;nbsp; x8 memory ICs&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes this is possible.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 25 Oct 2018 23:14:06 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2018-10-25T23:14:06Z</dc:date>
    <item>
      <title>i.MX8M DRAM Controller Data width</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-DRAM-Controller-Data-width/m-p/830655#M127637</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have learned from the datasheet of i.MX8M that the data width supported by the DRAM controller of the processor is only x16 and x32. Whereas, I can understand from the pinout that there are four pairs of data strobes and four data masks available. Can I make use of these signals to connect four numbers of&amp;nbsp; x8 memory ICs.&lt;/P&gt;&lt;P&gt;Or are these only meant for Quad die, Dual channel package devices like the one used in the EVK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Dixit&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Oct 2018 07:31:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-DRAM-Controller-Data-width/m-p/830655#M127637</guid>
      <dc:creator>dixit_jz</dc:creator>
      <dc:date>2018-10-25T07:31:01Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8M DRAM Controller Data width</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-DRAM-Controller-Data-width/m-p/830656#M127638</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dixit&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Can I make use of these signals to connect four numbers of&amp;nbsp; x8 memory ICs&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes this is possible.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Oct 2018 23:14:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-DRAM-Controller-Data-width/m-p/830656#M127638</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-10-25T23:14:06Z</dc:date>
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