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    <title>topic imx6ul - UART Rx dropping/corrupting bytes in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825818#M126989</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm using the imx6ul eval kit with the 4.9-1.0.x-imx Linux kernel:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/commits/4.9-1.0.x-imx" title="https://github.com/Freescale/linux-fslc/commits/4.9-1.0.x-imx"&gt;Commits · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a user-space application running on the imx6ul reading from /dev/ttymxc1 with the TTY configured in raw mode at 115200 baud.&amp;nbsp; The TTY is configured for DMA (not interrupt) via the device tree.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When the imx6ul receives small chunks of bytes (&amp;lt; 32 bytes) with delays between those bursts (&amp;gt; 1ms), the imx6ul UART receive seems to function properly.&amp;nbsp; However, when I send larger chunks (256 to 512 bytes) in a more continuous fashion, I'm seeing periodic drops or corruption.&amp;nbsp;&amp;nbsp; I'm running a logic analyzer on the UART signals and at the physical layer (decoding the signals) the expected bytes are transferred.&amp;nbsp; Hence I think there might be a UART driver problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Based on this post:&lt;A href="https://community.nxp.com/thread/381455"&gt;when use uart with DMA, why its DMA callback function invoked so slowly?&lt;/A&gt;&amp;nbsp; I tried changing DMA burst size relative to FIFO, but no luck.&amp;nbsp; There are still periodic errors.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;By "periodic error" I mean a single byte dropped and/or a single byte corrupted every few minutes.&amp;nbsp; I don't suspect HW issues, but it could be...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Questions:&lt;BR /&gt;Can anyone recommend if I should be using a newer/different Linux kernel/BSP?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Other posts refer to using flow control (RTS/CTS) for UART with DMA.&amp;nbsp; &lt;A href="https://community.nxp.com/thread/446830"&gt;issue about imx6 uart dma&lt;/A&gt;&amp;nbsp; Is this absolutely necessary?&amp;nbsp; Or just a recommendation?&amp;nbsp;&amp;nbsp; In my case, I don't think flow control is an option.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any other recommendations for debugging this would be appreciated.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 27 Jun 2018 13:40:07 GMT</pubDate>
    <dc:creator>nickbedbury</dc:creator>
    <dc:date>2018-06-27T13:40:07Z</dc:date>
    <item>
      <title>imx6ul - UART Rx dropping/corrupting bytes</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825818#M126989</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm using the imx6ul eval kit with the 4.9-1.0.x-imx Linux kernel:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/commits/4.9-1.0.x-imx" title="https://github.com/Freescale/linux-fslc/commits/4.9-1.0.x-imx"&gt;Commits · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a user-space application running on the imx6ul reading from /dev/ttymxc1 with the TTY configured in raw mode at 115200 baud.&amp;nbsp; The TTY is configured for DMA (not interrupt) via the device tree.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When the imx6ul receives small chunks of bytes (&amp;lt; 32 bytes) with delays between those bursts (&amp;gt; 1ms), the imx6ul UART receive seems to function properly.&amp;nbsp; However, when I send larger chunks (256 to 512 bytes) in a more continuous fashion, I'm seeing periodic drops or corruption.&amp;nbsp;&amp;nbsp; I'm running a logic analyzer on the UART signals and at the physical layer (decoding the signals) the expected bytes are transferred.&amp;nbsp; Hence I think there might be a UART driver problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Based on this post:&lt;A href="https://community.nxp.com/thread/381455"&gt;when use uart with DMA, why its DMA callback function invoked so slowly?&lt;/A&gt;&amp;nbsp; I tried changing DMA burst size relative to FIFO, but no luck.&amp;nbsp; There are still periodic errors.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;By "periodic error" I mean a single byte dropped and/or a single byte corrupted every few minutes.&amp;nbsp; I don't suspect HW issues, but it could be...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Questions:&lt;BR /&gt;Can anyone recommend if I should be using a newer/different Linux kernel/BSP?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Other posts refer to using flow control (RTS/CTS) for UART with DMA.&amp;nbsp; &lt;A href="https://community.nxp.com/thread/446830"&gt;issue about imx6 uart dma&lt;/A&gt;&amp;nbsp; Is this absolutely necessary?&amp;nbsp; Or just a recommendation?&amp;nbsp;&amp;nbsp; In my case, I don't think flow control is an option.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any other recommendations for debugging this would be appreciated.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Jun 2018 13:40:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825818#M126989</guid>
      <dc:creator>nickbedbury</dc:creator>
      <dc:date>2018-06-27T13:40:07Z</dc:date>
    </item>
    <item>
      <title>Re: imx6ul - UART Rx dropping/corrupting bytes</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825819#M126990</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Using flow control (RTS/CTS) for UART with DMA is absolutely necessary to avoid&lt;/P&gt;&lt;P&gt;data lost.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Jun 2018 14:12:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825819#M126990</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-06-27T14:12:31Z</dc:date>
    </item>
    <item>
      <title>Re: imx6ul - UART Rx dropping/corrupting bytes</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825820#M126991</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Would it be a valid assumption that with the smaller messages, I'm probably just getting lucky in "never" seeing byte errors?&amp;nbsp; I'm curious why sending more bytes more often seems to trigger an issue, or at least trigger it faster.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Nick&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Jun 2018 14:38:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825820#M126991</guid>
      <dc:creator>nickbedbury</dc:creator>
      <dc:date>2018-06-27T14:38:50Z</dc:date>
    </item>
    <item>
      <title>Re: imx6ul - UART Rx dropping/corrupting bytes</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825821#M126992</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;UART FIFO helps to avoid bytes lost.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Jun 2018 02:41:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6ul-UART-Rx-dropping-corrupting-bytes/m-p/825821#M126992</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-06-28T02:41:57Z</dc:date>
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