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    <title>topic Re: Low frequency screens initialization in U-boot for splash screen in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824567#M126798</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor&amp;nbsp;&lt;/P&gt;&lt;P&gt;I saw all of this posts before I started to develop my implementation.&lt;/P&gt;&lt;P&gt;In this patches video using pll5 with u-boot version 2017 and up for kernel 4.9 and up.&lt;/P&gt;&lt;P&gt;I'm using u-boot v 2015.04 for kernel 4.1.15 that received in BSP.&lt;/P&gt;&lt;P&gt;I cant use most of this code in my project.&lt;/P&gt;&lt;P&gt;All patches for version 2017 and up don't use a driver of ipu from directory&amp;nbsp;/drivers/video/... they used new implementation.&amp;nbsp;&lt;/P&gt;&lt;P&gt;All of this implementations is for&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;1024x768 VLDS screens only and minimum pll5 clock&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;My screens smaller than all these screens.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I founded that this patch support uses:&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;#define PLL5_FREQ_MIN 650000000&amp;nbsp; I need smaller frequency for my project ( my minimal clock is 63MHz and after dividing on 7 bit in a word of LVDS it will be 9MHz).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I already&amp;nbsp;running&amp;nbsp;screen on clock 63MHz (9MHz pix_clk) and 210MHz (30MHz pix_clk).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;It's new implementation but I&amp;nbsp;have some bug in ipu driver implementation ( mxc_ipu3_fb.c ipu_common.c ipu_disp.c) - sometime after reset of u-boot some of the registers not configured correctly and screen not working. In this case if I&amp;nbsp;let it continue to load kernel of linux u-boot load kernel to ram and try to&amp;nbsp;ipuv3_fb_shutdown() in file cpu.c and enter to endless loop because registers of DMA not configured properly.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Do you know someone who developed&amp;nbsp;&lt;SPAN&gt;ipu driver implementation?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;All regards,&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Alex&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 28 Jun 2018 14:07:40 GMT</pubDate>
    <dc:creator>alexandrspivac</dc:creator>
    <dc:date>2018-06-28T14:07:40Z</dc:date>
    <item>
      <title>Low frequency screens initialization in U-boot for splash screen</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824565#M126796</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hellow&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using "i.MX6Q" SOM&amp;nbsp;&lt;/P&gt;&lt;P&gt;I make some modifications in u-boot&lt;/P&gt;&lt;P&gt;I am using version v2015.04&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I&amp;nbsp;have to initialize screens in U-boot and put a splash screen on them.&lt;/P&gt;&lt;P&gt;I added support for small screens.&amp;nbsp;Derived clock from&amp;nbsp;PLL2 PFD0&amp;nbsp; to pll5. Added configuration for dividers of pll5 in board&amp;nbsp;code file. Added support of pll5 clock to "ipu_common.c" code file and put this clock to&amp;nbsp;ldb_clk[0].rate and&amp;nbsp;ldb_clk[1].rate Some code of this:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static unsigned long get_pll5_clk_rate(void)&lt;BR /&gt;{&lt;BR /&gt;struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;&lt;BR /&gt;int reg;&lt;BR /&gt;int post_div_select = 1;&lt;BR /&gt;int div_select;&lt;BR /&gt;int num;&lt;BR /&gt;int denum;&lt;BR /&gt;unsigned long ret;&lt;/P&gt;&lt;P&gt;reg = readl(&amp;amp;ccm-&amp;gt;analog_pll_video);&lt;BR /&gt;//post_div_select = reg &amp;amp; BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT &amp;gt;&amp;gt; BP_ANADIG_PLL_VIDEO_POST_DIV_SELECT;&lt;BR /&gt;switch ((reg &amp;amp; BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT) &amp;gt;&amp;gt; BP_ANADIG_PLL_VIDEO_POST_DIV_SELECT) {&lt;BR /&gt;case 0:&lt;BR /&gt;post_div_select = 4;&lt;BR /&gt;break;&lt;BR /&gt;case 1:&lt;BR /&gt;post_div_select = 2;&lt;BR /&gt;break;&lt;BR /&gt;case 2:&lt;BR /&gt;post_div_select = 1;&lt;BR /&gt;break;&lt;BR /&gt;default:&lt;BR /&gt;break;&lt;BR /&gt;}&lt;BR /&gt;div_select = reg &amp;amp; BM_ANADIG_PLL_VIDEO_DIV_SELECT;&lt;BR /&gt;reg = readl(&amp;amp;ccm-&amp;gt;analog_pll_video_num);&lt;BR /&gt;num = reg &amp;amp; BM_ANADIG_PLL_VIDEO_NUM_A;&lt;BR /&gt;if ( num &amp;amp; (1&amp;lt;&amp;lt;29) ) num |= 0xC0000000;&lt;BR /&gt;reg = readl(&amp;amp;ccm-&amp;gt;analog_pll_video_denom);&lt;BR /&gt;denum = reg &amp;amp; BM_ANADIG_PLL_VIDEO_DENOM_B;&lt;BR /&gt;ret = ( unsigned long ) (24000000.0*((float)div_select+(float)num/(float)denum)/(float)post_div_select);&lt;BR /&gt;#ifdef DEBUG&lt;BR /&gt;debug("Function %s post_div_select = %d\n", __func__, post_div_select);&lt;BR /&gt;debug("Function %s div_select = %d\n", __func__, div_select);&lt;BR /&gt;debug("Function %s num = %d\n", __func__, num);&lt;BR /&gt;debug("Function %s denum = %d\n", __func__, denum);&lt;BR /&gt;//debug("Function %s divider = %9.6f\n", __func__, divider);&lt;BR /&gt;debug("Function %s pll5 clock = %lu\n", __func__, ret);&lt;BR /&gt;#endif&lt;BR /&gt;return ( ret );&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;in&amp;nbsp;int ipu_probe(void)&lt;/P&gt;&lt;P&gt;ldb_clk[0].rate = get_pll5_clk_rate()/7;&lt;BR /&gt;ldb_clk[1].rate = ldb_clk[0].rate;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I successfully initialize this my screens and have a splash screen :&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;struct display_info_t const displays[] = {{&lt;BR /&gt;.bus = -1,&amp;nbsp;&lt;BR /&gt;.addr = 0,&amp;nbsp;&lt;BR /&gt;.pixfmt = IPU_PIX_FMT_RGB24,&amp;nbsp;&lt;BR /&gt;.detect = detect_display_board_obc,&lt;BR /&gt;.enable = enable_lvds_obc,&amp;nbsp;&lt;BR /&gt;.mode = {&lt;BR /&gt;.name = "HVGA-OBC",&lt;BR /&gt;.refresh = 60,&lt;BR /&gt;.xres = 480,&lt;BR /&gt;.yres = 272,&lt;BR /&gt;.pixclock = MHZ2PS(9),&amp;nbsp;&lt;BR /&gt;.left_margin = 2,&amp;nbsp;&lt;BR /&gt;.right_margin = 2,&amp;nbsp;&lt;BR /&gt;.upper_margin = 2,&amp;nbsp;&lt;BR /&gt;.lower_margin = 2,&amp;nbsp;&lt;BR /&gt;.hsync_len = 41,&lt;BR /&gt;.vsync_len = 10,&amp;nbsp;&lt;BR /&gt;.sync = FB_SYNC_EXT ,&amp;nbsp;&lt;BR /&gt;.vmode = FB_VMODE_NONINTERLACED&amp;nbsp;&lt;BR /&gt;} }, {&lt;BR /&gt;.bus = 0,&amp;nbsp;&lt;BR /&gt;.addr = -1,&amp;nbsp;&lt;BR /&gt;.pixfmt = IPU_PIX_FMT_RGB24,&amp;nbsp;&lt;BR /&gt;.detect = detect_display_board_vt600,&lt;BR /&gt;.enable = enable_lvds_vt600,&amp;nbsp;&lt;BR /&gt;.mode = {&lt;BR /&gt;.name = "WVGA-VT600",&lt;BR /&gt;.refresh = 60,&amp;nbsp;&lt;BR /&gt;.xres = 800,&lt;BR /&gt;.yres = 480,&lt;BR /&gt;.pixclock = MHZ2PS(30),&amp;nbsp;&lt;BR /&gt;.left_margin = 88,&amp;nbsp;&lt;BR /&gt;.right_margin = 40,&lt;BR /&gt;.upper_margin = 32,&lt;BR /&gt;.lower_margin = 13,&amp;nbsp;&lt;BR /&gt;.hsync_len = 48,&amp;nbsp;&lt;BR /&gt;.vsync_len = 3,&lt;BR /&gt;.sync = FB_SYNC_EXT,&lt;BR /&gt;.vmode = FB_VMODE_NONINTERLACED&lt;BR /&gt;} } };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After some resets of u-boot in some cases screen not initialized&amp;nbsp;properly and screen white with color lines.&lt;/P&gt;&lt;P&gt;U-boot copy kernel and device tree to ram and hang.&lt;/P&gt;&lt;P&gt;After some debugging,&amp;nbsp;I founded an endless loop in the file "ipu_disp.c" :&lt;/P&gt;&lt;P&gt;do {&lt;BR /&gt;reg = __raw_readl(IPUIRQ_2_STATREG(irq));&lt;BR /&gt;} while (!(reg &amp;amp; IPUIRQ_2_MASK(irq)));&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I understand that initialization was not properly but cannot find what cause this.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Someone can help me?&lt;/P&gt;&lt;P&gt;&amp;nbsp;All Regards,&lt;/P&gt;&lt;P&gt;Alex&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Jun 2018 15:23:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824565#M126796</guid>
      <dc:creator>alexandrspivac</dc:creator>
      <dc:date>2018-06-27T15:23:30Z</dc:date>
    </item>
    <item>
      <title>Re: Low frequency screens initialization in U-boot for splash screen</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824566#M126797</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Alex&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;example of low frequency initialization can be found on&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" class="link-titled" href="https://community.nxp.com/message/833716?commentID=833716#comment-833716" title="https://community.nxp.com/message/833716?commentID=833716#comment-833716"&gt;https://community.nxp.com/message/833716?commentID=833716#comment-833716&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;uboot logo patches:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-98109"&gt;https://community.nxp.com/docs/DOC-98109&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Jun 2018 23:03:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824566#M126797</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-06-27T23:03:59Z</dc:date>
    </item>
    <item>
      <title>Re: Low frequency screens initialization in U-boot for splash screen</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824567#M126798</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor&amp;nbsp;&lt;/P&gt;&lt;P&gt;I saw all of this posts before I started to develop my implementation.&lt;/P&gt;&lt;P&gt;In this patches video using pll5 with u-boot version 2017 and up for kernel 4.9 and up.&lt;/P&gt;&lt;P&gt;I'm using u-boot v 2015.04 for kernel 4.1.15 that received in BSP.&lt;/P&gt;&lt;P&gt;I cant use most of this code in my project.&lt;/P&gt;&lt;P&gt;All patches for version 2017 and up don't use a driver of ipu from directory&amp;nbsp;/drivers/video/... they used new implementation.&amp;nbsp;&lt;/P&gt;&lt;P&gt;All of this implementations is for&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;1024x768 VLDS screens only and minimum pll5 clock&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;My screens smaller than all these screens.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I founded that this patch support uses:&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;#define PLL5_FREQ_MIN 650000000&amp;nbsp; I need smaller frequency for my project ( my minimal clock is 63MHz and after dividing on 7 bit in a word of LVDS it will be 9MHz).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I already&amp;nbsp;running&amp;nbsp;screen on clock 63MHz (9MHz pix_clk) and 210MHz (30MHz pix_clk).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;It's new implementation but I&amp;nbsp;have some bug in ipu driver implementation ( mxc_ipu3_fb.c ipu_common.c ipu_disp.c) - sometime after reset of u-boot some of the registers not configured correctly and screen not working. In this case if I&amp;nbsp;let it continue to load kernel of linux u-boot load kernel to ram and try to&amp;nbsp;ipuv3_fb_shutdown() in file cpu.c and enter to endless loop because registers of DMA not configured properly.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Do you know someone who developed&amp;nbsp;&lt;SPAN&gt;ipu driver implementation?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;All regards,&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Alex&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Jun 2018 14:07:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824567#M126798</guid>
      <dc:creator>alexandrspivac</dc:creator>
      <dc:date>2018-06-28T14:07:40Z</dc:date>
    </item>
    <item>
      <title>Re: Low frequency screens initialization in U-boot for splash screen</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824568#M126799</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Alex&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can try help of NXP Professional Services:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE" title="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE"&gt;NXP Professional Services|NXP&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Jun 2018 23:24:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Low-frequency-screens-initialization-in-U-boot-for-splash-screen/m-p/824568#M126799</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-06-28T23:24:32Z</dc:date>
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