topic NAND Flash and GPIO Boot Overides in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/NAND-Flash-and-GPIO-Boot-Overides/m-p/210950#M12669 <HTML><HEAD></HEAD><BODY><P>Hey Folks,</P><P>I'm designing a new board based off the QSB. &nbsp;I am adding two NAND flash chips and connecting them to the EIM_DA[7..0] pins. &nbsp; &nbsp;These are the same pins used for some of the GPIO boot overides which are sampled at boot when using boot mode 0x00. &nbsp; If I use 10k pull-ups/downs on these pins to select my desired boot config, will it interfere with normal NAND operation? &nbsp; Should I instead configure my NAND to use the PATA lines? &nbsp;Or should I just not use internal boot and boot from fuses instead?&nbsp;</P><P></P><P>Suggestions appreciated.</P><P></P><P>Thanks.</P><P>Mark Roy&nbsp;</P></BODY></HTML> Tue, 14 Feb 2012 18:36:50 GMT MarkRoy 2012-02-14T18:36:50Z NAND Flash and GPIO Boot Overides https://community.nxp.com/t5/i-MX-Processors/NAND-Flash-and-GPIO-Boot-Overides/m-p/210950#M12669 <HTML><HEAD></HEAD><BODY><P>Hey Folks,</P><P>I'm designing a new board based off the QSB. &nbsp;I am adding two NAND flash chips and connecting them to the EIM_DA[7..0] pins. &nbsp; &nbsp;These are the same pins used for some of the GPIO boot overides which are sampled at boot when using boot mode 0x00. &nbsp; If I use 10k pull-ups/downs on these pins to select my desired boot config, will it interfere with normal NAND operation? &nbsp; Should I instead configure my NAND to use the PATA lines? &nbsp;Or should I just not use internal boot and boot from fuses instead?&nbsp;</P><P></P><P>Suggestions appreciated.</P><P></P><P>Thanks.</P><P>Mark Roy&nbsp;</P></BODY></HTML> Tue, 14 Feb 2012 18:36:50 GMT https://community.nxp.com/t5/i-MX-Processors/NAND-Flash-and-GPIO-Boot-Overides/m-p/210950#M12669 MarkRoy 2012-02-14T18:36:50Z