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    <title>i.MX ProcessorsのトピックRe: i.MX6SX Cortex-M4 SDMA M2M Transfer Problem</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822787#M126597</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vanessa,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have uploaded the complete project folder as&amp;nbsp;FreeRTOS_BSP_1.0.1_iMX6SX_SDMA.tgz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Jake&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 01 Nov 2018 01:16:42 GMT</pubDate>
    <dc:creator>joursland</dc:creator>
    <dc:date>2018-11-01T01:16:42Z</dc:date>
    <item>
      <title>i.MX6SX Cortex-M4 SDMA M2M Transfer Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822783#M126593</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have ported over the i.MX6UL FreeRTOS SDMA and sdma_memory_to_memory example application to the i.MX6SX platform for the Cortex-M4 core.&amp;nbsp; When I run the application I get some strange behavior dependent upon the "count" parameter of the SDMA BD.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Platform: i.MX6SX SABRE-SDB&lt;/P&gt;&lt;P&gt;Software: FreeRTOS_BSP_1.0.1_iMX6SX&lt;/P&gt;&lt;P&gt;Toolchain:&amp;nbsp;GNU Tools for Arm Embedded Processors 7-2018-q3-update&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Expected Behavior:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; * All bytes in the source buffer are correctly copied to the destination buffer via the SDMA&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Actual Behavior:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; * For counts 1-7, the source is correctly copied to the destination buffer.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; * For count of 8 bytes, the first 4 bytes of the source are copied to the destination, then the next 4 bytes are copied to offset 12 (incorrectly skipping 8 bytes).&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; * For a count of 12 bytes, the behavior of 8 bytes is observed, but then the source bytes at offsets 8-11 are correctly located at destination offsets 8-11.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; * For a count of 16 bytes, the behavior of 12 bytes is observed, but bytes at source offsets 8-15 are reproduced at destination offsets 16-23.&amp;nbsp; This means bytes at offsets 8-11 are duplicated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Steps to Reproduce:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; 1. Download the attached memory_to_memory.zip example&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; 2. Create the directory&amp;nbsp;FreeRTOS_BSP_1.0.1_iMX6SX/examples/imx6sx_sdb_m4/driver_examples/sdma&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; 3. Extract the zip file to the location&amp;nbsp;FreeRTOS_BSP_1.0.1_iMX6SX/examples/imx6sx_sdb_m4/driver_examples/sdma.&amp;nbsp; A directory containing source should be created at&amp;nbsp;FreeRTOS_BSP_1.0.1_iMX6SX/examples/imx6sx_sdb_m4/driver_examples/sdma/memory_to_memory.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; 4. Build with the script build_debug.sh in the&amp;nbsp;FreeRTOS_BSP_1.0.1_iMX6SX/examples/imx6sx_sdb_m4/driver_examples/sdma/memory_to_memory/armgcc.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; 5. Load and run the resulting binary within u-boot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Notes:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; * All memory is within the TCM so as to eliminate external memory configuration concerns.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is there some misconfiguration within my program that would cause the SDMA M2M (IMX6SXRM Appendix A ap_2_ap) script to perform this behavior?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Jake&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;2018-10-30:&amp;nbsp;The requested file has been uploaded.&amp;nbsp;&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Jake&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Oct 2018 18:57:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822783#M126593</guid>
      <dc:creator>joursland</dc:creator>
      <dc:date>2018-10-22T18:57:41Z</dc:date>
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    <item>
      <title>Re: i.MX6SX Cortex-M4 SDMA M2M Transfer Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822784#M126594</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/vanessamaegima"&gt;vanessamaegima&lt;/A&gt;‌, can you help with this thread?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2018 02:40:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822784#M126594</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2018-10-30T02:40:42Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SX Cortex-M4 SDMA M2M Transfer Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822785#M126595</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sure Karina, I will investigate this.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2018 13:35:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822785#M126595</guid>
      <dc:creator>vanessa_maegima</dc:creator>
      <dc:date>2018-10-30T13:35:29Z</dc:date>
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    <item>
      <title>Re: i.MX6SX Cortex-M4 SDMA M2M Transfer Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822786#M126596</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/joursland@jetheaddev.com"&gt;joursland@jetheaddev.com&lt;/A&gt;‌,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please send me the full project folder with your modifications (FreeRTOS_BSP_1.0.1_iMX6SX)?&lt;/P&gt;&lt;P&gt;I see some missing files trying to compile just by adding the "memory_to_memory" folder.&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;/home/vanessa/Documents/community/487273_sx_sdma_m2m/FreeRTOS_BSP_1.0.1_iMX6SX/platform/drivers/src/ccm_analog_imx6sx.c:31:31: fatal error: &lt;STRONG&gt;ccm_analog_imx6sx.h&lt;/STRONG&gt;: No such file or directory&lt;BR /&gt;/home/vanessa/Documents/community/487273_sx_sdma_m2m/FreeRTOS_BSP_1.0.1_iMX6SX/platform/drivers/src/ccm_imx6sx.c:31:24: fatal error: &lt;STRONG&gt;ccm_imx6sx.h&lt;/STRONG&gt;: No such file or directory&lt;BR /&gt;/home/vanessa/Documents/community/487273_sx_sdma_m2m/FreeRTOS_BSP_1.0.1_iMX6SX/platform/utilities/src/debug_console_imx.c:35:24: fatal error: &lt;STRONG&gt;device_imx.h&lt;/STRONG&gt;: No such file or directory&lt;BR /&gt;/home/vanessa/Documents/community/487273_sx_sdma_m2m/FreeRTOS_BSP_1.0.1_iMX6SX/platform/drivers/src/lmem.c:31:18: fatal error: &lt;STRONG&gt;lmem.h&lt;/STRONG&gt;: No such file or directory&lt;BR /&gt;/home/vanessa/Documents/community/487273_sx_sdma_m2m/FreeRTOS_BSP_1.0.1_iMX6SX/platform/drivers/src/ccm_analog_imx6sx.c:31:31: fatal error: &lt;STRONG&gt;ccm_analog_imx6sx.h&lt;/STRONG&gt;: No such file or directory&lt;BR /&gt;/home/vanessa/Documents/community/487273_sx_sdma_m2m/FreeRTOS_BSP_1.0.1_iMX6SX/platform/drivers/src/ccm_imx6sx.c:31:24: fatal error: &lt;STRONG&gt;ccm_imx6sx.h&lt;/STRONG&gt;: No such file or directory&lt;BR /&gt;/home/vanessa/Documents/community/487273_sx_sdma_m2m/FreeRTOS_BSP_1.0.1_iMX6SX/platform/utilities/src/debug_console_imx.c:35:24: fatal error: &lt;STRONG&gt;device_imx.h&lt;/STRONG&gt;: No such file or directory&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;I could copy the files from the 6UL SDK but I just want to make sure I have the same setup as yours.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;BR /&gt;Vanessa&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2018 19:30:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822786#M126596</guid>
      <dc:creator>vanessa_maegima</dc:creator>
      <dc:date>2018-10-30T19:30:05Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SX Cortex-M4 SDMA M2M Transfer Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822787#M126597</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vanessa,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have uploaded the complete project folder as&amp;nbsp;FreeRTOS_BSP_1.0.1_iMX6SX_SDMA.tgz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Jake&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Nov 2018 01:16:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822787#M126597</guid>
      <dc:creator>joursland</dc:creator>
      <dc:date>2018-11-01T01:16:42Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SX Cortex-M4 SDMA M2M Transfer Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822788#M126598</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jacob,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I received your package and I can see the issue on my board.&lt;/P&gt;&lt;P&gt;I started investigating this and I'll probably have an answer by next week (will be out of office tomorrow).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;P&gt;Vanessa&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Nov 2018 19:22:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822788#M126598</guid>
      <dc:creator>vanessa_maegima</dc:creator>
      <dc:date>2018-11-01T19:22:14Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SX Cortex-M4 SDMA M2M Transfer Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822789#M126599</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jacob,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think the problem is that the SDMA scripts are made from the Cortex-A perspective, the iMX6UL has only a Cortex-A9 core so that's why it has a SDMA M2M example. You would need to modify the SDMA scripts to make them work with the M4 core.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately we cannot provide the SDMA scripts source code and/or modifications, this is out of the standard support that we provide. You can contact Professional Services to check if this is something that can be done.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Reference: &lt;A href="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE"&gt;https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE&lt;/A&gt;&lt;BR /&gt;Contact: &lt;A href="mailto:Prosupport@nxp.com"&gt;Prosupport@nxp.com&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;P&gt;Vanessa&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 06 Nov 2018 14:42:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/822789#M126599</guid>
      <dc:creator>vanessa_maegima</dc:creator>
      <dc:date>2018-11-06T14:42:53Z</dc:date>
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      <title>This an automatic process.  We are marking this post as s...</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/1143214#M161209</link>
      <description>&lt;B&gt;This an automatic process.&lt;/B&gt;&lt;BR /&gt;&lt;BR /&gt;
We are marking this post as solved, due to the either low activity or any reply marked as correct.&lt;BR /&gt;&lt;BR /&gt;
If you have additional questions, please create a new post and reference to this closed post.&lt;BR /&gt;&lt;BR /&gt;
NXP Community!</description>
      <pubDate>Fri, 04 Sep 2020 01:24:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SX-Cortex-M4-SDMA-M2M-Transfer-Problem/m-p/1143214#M161209</guid>
      <dc:creator>CommunityBot</dc:creator>
      <dc:date>2020-09-04T01:24:26Z</dc:date>
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