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    <title>i.MX ProcessorsのトピックRe:  PCIe of i.MX6 don’t work with external clock</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821982#M126530</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #000000; font-size: 14px;"&gt;I want set CCM_ANALOG_PLL_ENET to 0x00114000. But I checked that register after kernel booted, then it was 0x00017000. What file should I change for setting that register value before initializing pci driver.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 04 Oct 2018 15:55:13 GMT</pubDate>
    <dc:creator>massohy</dc:creator>
    <dc:date>2018-10-04T15:55:13Z</dc:date>
    <item>
      <title>PCIe of i.MX6 don’t work with external clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821981#M126529</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;Dear Community Member,&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;I am trying PCIe with new original board. Its PCIe is driven by external clock. &amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;PCIe use input clock from CLK_1N/P. Its clock is 100MHz and LVDS level.&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;I modified clk-imx6.c, pci-imx6.c and dts file in tune with inputting external clock in reference to this thread.&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/thread/455537" style="color: #954f72; text-decoration: underline;"&gt;i.MX6q PCIe with external clock and SATA&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/thread/455537" style="color: #954f72; text-decoration: underline;"&gt;https://community.nxp.com/thread/455537&lt;/A&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; clocks {&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; anaclk1 {&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "fixed-clock";&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; reg = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; #clock-cells = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; clock-frequency = &amp;lt;100000000&amp;gt;;&amp;nbsp; /* 100MHz */&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;amp;pcie {&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; clocks = &amp;lt;&amp;amp;clks IMX6QDL_CLK_PCIE_AXI&amp;gt;,&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;lt;&amp;amp;clks IMX6QDL_CLK_LVDS1_IN&amp;gt;,&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;lt;&amp;amp;clks IMX6QDL_CLK_PCIE_REF_125M&amp;gt;,&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;lt;&amp;amp;clks IMX6QDL_PLL6_BYPASS&amp;gt;,&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;lt;&amp;amp;clks IMX6QDL_PLL6_BYPASS_SRC&amp;gt;;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_ext", "pcie_ext_src";&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ext_osc = &amp;lt;1&amp;gt;;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;};&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;amp;clks {&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; assigned-clocks = &amp;lt;&amp;amp;clks IMX6QDL_PLL6_BYPASS_SRC&amp;gt;,&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;lt;&amp;amp;clks IMX6QDL_PLL6_BYPASS&amp;gt;;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; assigned-clock-parents = &amp;lt;&amp;amp;clks IMX6QDL_CLK_LVDS1_IN&amp;gt;,&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;lt;&amp;amp;clks IMX6QDL_PLL6_BYPASS_SRC&amp;gt;;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; assigned-clock-rates = &amp;lt;100000000&amp;gt;, &amp;lt;100000000&amp;gt;;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;};&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;And I added this line in *.cfg file of u-boot in reference to this thread.&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;Setting the iMX6 PCIe Clocks&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-101788" style="color: #954f72; text-decoration: underline;"&gt;https://community.nxp.com/docs/DOC-101788&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;DATA 4, 0x020c80e4, 0x00010501&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;But I encountered these messages at booting kernel.&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;1ffc000.pcie supply pcie-bus not found, using dummy regulator&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;imx6q-pcie 1ffc000.pcie: phy link never came up&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;imx6q-pcie 1ffc000.pcie: Failed to bring link up!&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;imx6q-pcie 1ffc000.pcie: failed to initialize host&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;imx6q-pcie: probe of 1ffc000.pcie failed with error -22&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;Please tell me where I should check and modify.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 04 Oct 2018 03:28:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821981#M126529</guid>
      <dc:creator>massohy</dc:creator>
      <dc:date>2018-10-04T03:28:57Z</dc:date>
    </item>
    <item>
      <title>Re:  PCIe of i.MX6 don’t work with external clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821982#M126530</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #000000; font-size: 14px;"&gt;I want set CCM_ANALOG_PLL_ENET to 0x00114000. But I checked that register after kernel booted, then it was 0x00017000. What file should I change for setting that register value before initializing pci driver.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 04 Oct 2018 15:55:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821982#M126530</guid>
      <dc:creator>massohy</dc:creator>
      <dc:date>2018-10-04T15:55:13Z</dc:date>
    </item>
    <item>
      <title>Re:  PCIe of i.MX6 don’t work with external clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821983#M126531</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;After I changed device tree like above, then CCM_ANALOG_PLL_ENET become to 0x00017000. It means PLL is down. Is it no problem because PCIe use external clock? Or should it be PLL locked and ENABLE_100M asserted?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Oct 2018 07:04:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821983#M126531</guid>
      <dc:creator>massohy</dc:creator>
      <dc:date>2018-10-05T07:04:23Z</dc:date>
    </item>
    <item>
      <title>Re:  PCIe of i.MX6 don’t work with external clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821984#M126532</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi mas&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;seems you are right, if external clock is used, pll is not needed.&lt;/P&gt;&lt;P&gt;You can try to test several pcie cards for "link-up" issue, recommended to use linux&lt;/P&gt;&lt;P&gt;from nxp repository&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/" title="https://source.codeaurora.org/external/imx/linux-imx/"&gt;linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Oct 2018 23:10:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821984#M126532</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-10-05T23:10:04Z</dc:date>
    </item>
    <item>
      <title>Re:  PCIe of i.MX6 don’t work with external clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821985#M126533</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;Hi igor,&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;I succeeded to establish PCIe connection between i.MX6 and FPGA.&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;I replaced pci-imx6.c to newer file. And I patched these two points.&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;- LOW_ACTIVE&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;- if (imx6_pcie-&amp;gt;ext_osc /*&amp;amp;&amp;amp; is_imx6qp_pcie(imx6_pcie)*/) {&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;to pci-imx6.c.&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;And I activated PCIe end point unit on FPGA.&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;I got that those messages were also displayed at not only when driver cannot input correct clock but when PCIe EP not connected .&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;Thank you for your advice.&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0.0001pt; font-size: 10.5pt; color: #000000; font-weight: 400; text-indent: 0px;"&gt;best regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Oct 2018 13:34:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-of-i-MX6-don-t-work-with-external-clock/m-p/821985#M126533</guid>
      <dc:creator>massohy</dc:creator>
      <dc:date>2018-10-10T13:34:41Z</dc:date>
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