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    <title>topic Re: Single channel LPDDR4  in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818567#M126108</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; Since&amp;nbsp;&lt;SPAN style="color: black;"&gt;LPDDR4 device consists of two identical channels operating independently, it is possible to&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;configure&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;single channel x16 mode. But we do not have tested example for it. Customers can try&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;&lt;A href="https://community.nxp.com/docs/DOC-340179"&gt;i.MX 8M DDR Tool Release&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;As for Linux&amp;nbsp; - refer to chapter "Porting U-Boot" in&amp;nbsp; "i.MX_BSP_Porting_Guide.pdf"&amp;nbsp; in NXP Linux doc&lt;/P&gt;&lt;P&gt;package.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 15 Nov 2018 05:25:14 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2018-11-15T05:25:14Z</dc:date>
    <item>
      <title>Single channel LPDDR4</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818564#M126105</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Can i.MX8 support single channel LPDDR4? If can, how?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 09 Nov 2018 03:09:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818564#M126105</guid>
      <dc:creator>kayiyeh</dc:creator>
      <dc:date>2018-11-09T03:09:20Z</dc:date>
    </item>
    <item>
      <title>Re: Single channel LPDDR4</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818565#M126106</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; LPDDR4 is essentially dual channeled; using single channel means &lt;BR /&gt;half of memory is lost.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #727272; font-family: 'Proximanova Regular', sans-serif; font-size: 19px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: -0.76px; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial; display: inline !important; float: none;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Nov 2018 09:58:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818565#M126106</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-11-12T09:58:00Z</dc:date>
    </item>
    <item>
      <title>Re: Single channel LPDDR4</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818566#M126107</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Yuri,&lt;/P&gt;&lt;P&gt;Yes I understand the impact of the single channel to dual channel. However, what if I under some special condition and have to do that (single channel)? The special condition may mean&amp;nbsp; a downgrade memory chip was mounted to board and it happens to have one bit data bus stuck at zero.&amp;nbsp; So back to my original question, can I use single channel LPDDR4? If I use Linux to boot up, do I need to rebuild the kernel or just change some configurations in uboot?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kayi&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Nov 2018 00:15:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818566#M126107</guid>
      <dc:creator>kayiyeh</dc:creator>
      <dc:date>2018-11-14T00:15:58Z</dc:date>
    </item>
    <item>
      <title>Re: Single channel LPDDR4</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818567#M126108</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; Since&amp;nbsp;&lt;SPAN style="color: black;"&gt;LPDDR4 device consists of two identical channels operating independently, it is possible to&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;configure&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;single channel x16 mode. But we do not have tested example for it. Customers can try&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;&lt;A href="https://community.nxp.com/docs/DOC-340179"&gt;i.MX 8M DDR Tool Release&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;As for Linux&amp;nbsp; - refer to chapter "Porting U-Boot" in&amp;nbsp; "i.MX_BSP_Porting_Guide.pdf"&amp;nbsp; in NXP Linux doc&lt;/P&gt;&lt;P&gt;package.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Nov 2018 05:25:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/818567#M126108</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-11-15T05:25:14Z</dc:date>
    </item>
    <item>
      <title>Re: Single channel LPDDR4</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/1806450#M219939</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;BR /&gt;How can we check the lpddr is used whether it is single channel or dual channel in the SW configurations in my yocto project ?&lt;/P&gt;</description>
      <pubDate>Wed, 14 Feb 2024 10:44:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-channel-LPDDR4/m-p/1806450#M219939</guid>
      <dc:creator>sbmd_1234</dc:creator>
      <dc:date>2024-02-14T10:44:55Z</dc:date>
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