SNVS Regulator

eishishibusawa — Thu, 23 Aug 2018 02:34:51 GMT

Dear Sir

I refer to the IMX6SDLRM Rev.4.

P4516 51.5 SNVS Regulator

If VDDHIGH_IN is present, then the SNVS_IN supply is internally shorted to the VDDHIGH_IN supply.

VDDHIGH_IN can be separated from SNVS_IN by setting the PMU_MISC0[discon_high_snvs] bit.

P910 CCM_ANALOG_MISC0n field descriptions (continued)

discon_high_snvs : This bit forces the short between VDDHIGH_IN and VSNVS_IN to open when asserted. This is useful in power cases where SNVS_IN > VDDHIGH_IN.

I refer to the schematic of MCIMX6DL-SDP (SPF-27417_C5.pdf).

VDDHIGH_IN_1/2 = VDDHIGH_IN = VGEN5 = 2.8V

VDD_SNVS_IN = VSNVS_3V0 = 3.0V

(SNVS_IN > VDDHIGH_IN)

Q1.

Is it necessary to set PMU_MISC0[discon_high_snvs] bit when designing like MCIMX6DL-SDP?

Best Regards,

Eishi SHIBUSAWA

Re: SNVS Regulator

igorpadykov — Thu, 23 Aug 2018 09:28:57 GMT

Hi Eishi

your understanding is correct and more described in Table 2-6. Power and decouple

recommendations i.MX6 System Development User’s Guide

https://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf

This setting may be useful in battery powered designs.

However in case MCIMX6DL-SDP design SNVS_IN is powered from

pmic PMIC_VSNVS and its SNVS current provided from VIN which eventually is

powered from board external 5V/5A universal DC power supply, not from LICELL so

coincell will not be discharged to VDDHIGH_IN. Pmic VSNVS generation is described in

sect.6.4.7VSNVS LDO/Switch MMPF0100 Datasheet

https://www.nxp.com/docs/en/data-sheet/MMPF0100.pdf

Best regards
igor
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