<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic nwl-dsi configuration in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812465#M125286</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm trying to figure out the details for the above in the linux kernel for a DSI panel:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Looking at&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L414" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L414"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If vm-&amp;gt;hactive is &amp;gt; 255 it will be cut off since according to the reference manual only the lower 16bit of this register (MIPI_DSI_HOST_DPI_INTFC_DSI_HOST_CFG_DPI_PIXEL_FIFO_SEN) are being used.&lt;/P&gt;&lt;P&gt;Also&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L411" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L411"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;would result in all zeros since 256 &amp;gt; 255.&lt;/P&gt;&lt;P&gt;Is this an error in the docs or are we really&amp;nbsp; only looing at the lower 16 bits here (which might be all zeros)?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also non-continous clock mode is being disabled:&lt;/P&gt;&lt;P&gt;Enable here:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Disabled again here&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Why is this being done?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 07 Nov 2018 10:41:36 GMT</pubDate>
    <dc:creator>guido_gunther</dc:creator>
    <dc:date>2018-11-07T10:41:36Z</dc:date>
    <item>
      <title>nwl-dsi configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812465#M125286</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm trying to figure out the details for the above in the linux kernel for a DSI panel:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Looking at&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L414" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L414"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If vm-&amp;gt;hactive is &amp;gt; 255 it will be cut off since according to the reference manual only the lower 16bit of this register (MIPI_DSI_HOST_DPI_INTFC_DSI_HOST_CFG_DPI_PIXEL_FIFO_SEN) are being used.&lt;/P&gt;&lt;P&gt;Also&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L411" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L411"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;would result in all zeros since 256 &amp;gt; 255.&lt;/P&gt;&lt;P&gt;Is this an error in the docs or are we really&amp;nbsp; only looing at the lower 16 bits here (which might be all zeros)?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also non-continous clock mode is being disabled:&lt;/P&gt;&lt;P&gt;Enable here:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Disabled again here&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Why is this being done?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 07 Nov 2018 10:41:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812465#M125286</guid>
      <dc:creator>guido_gunther</dc:creator>
      <dc:date>2018-11-07T10:41:36Z</dc:date>
    </item>
    <item>
      <title>Re: nwl-dsi configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812466#M125287</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;If vm-&amp;gt;hactive is &amp;gt; 255 it will be cut off since according to the reference manual only the lower 16bit of this register&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Scratch the first part please. It's a 16 bit register not an 8 bit one so it can hold values up to&amp;nbsp;65535.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The non-continous clock mode part is still unclear to me though.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 07 Nov 2018 16:23:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812466#M125287</guid>
      <dc:creator>guido_gunther</dc:creator>
      <dc:date>2018-11-07T16:23:48Z</dc:date>
    </item>
    <item>
      <title>Re: nwl-dsi configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812467#M125288</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Which board and kernel are you using?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Diego&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Nov 2018 20:56:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812467#M125288</guid>
      <dc:creator>diegoadrian</dc:creator>
      <dc:date>2018-11-22T20:56:52Z</dc:date>
    </item>
    <item>
      <title>Re: nwl-dsi configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812468#M125289</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Which board and kernel are you using?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Since this happens in all of NXPs 4.9 kernels (see above link):&amp;nbsp;&lt;A class="link-titled" href="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120" title="https://github.com/Freescale/linux-fslc/blob/4.9-2.3.x-imx/drivers/gpu/drm/bridge/nwl-dsi.c#L1120"&gt;linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;the board doesn't matter. I'm seeing this on NXPs reference board as well.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Nov 2018 17:23:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/nwl-dsi-configuration/m-p/812468#M125289</guid>
      <dc:creator>guido_gunther</dc:creator>
      <dc:date>2018-11-26T17:23:07Z</dc:date>
    </item>
  </channel>
</rss>

