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    <title>i.MX Processors中的主题 FreeRTOS .text area in IMX7D-M4 TCM memory</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/FreeRTOS-text-area-in-IMX7D-M4-TCM-memory/m-p/806854#M124517</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have searched a lot but I did not&amp;nbsp;find a good answer if it is possible to store code of FreeRTOS on the Cortex-M4 internal memory TCM_L and TCM_H together.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So my question is, is it possible to store code on both memory areas without splitting them in the tcm.ld memory definition file? Can I use them as one memory area? In FreeRTOS I can define a .text area which is mapped to a defined memory area of the tcm.ld file. &lt;BR /&gt;Does this cause failures if instructions are stored over the area of TCM_L and TCM_H?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Thanks in advance for your reply.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 10 Sep 2018 07:35:03 GMT</pubDate>
    <dc:creator>andreas_vorderl</dc:creator>
    <dc:date>2018-09-10T07:35:03Z</dc:date>
    <item>
      <title>FreeRTOS .text area in IMX7D-M4 TCM memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FreeRTOS-text-area-in-IMX7D-M4-TCM-memory/m-p/806854#M124517</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have searched a lot but I did not&amp;nbsp;find a good answer if it is possible to store code of FreeRTOS on the Cortex-M4 internal memory TCM_L and TCM_H together.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So my question is, is it possible to store code on both memory areas without splitting them in the tcm.ld memory definition file? Can I use them as one memory area? In FreeRTOS I can define a .text area which is mapped to a defined memory area of the tcm.ld file. &lt;BR /&gt;Does this cause failures if instructions are stored over the area of TCM_L and TCM_H?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Thanks in advance for your reply.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Sep 2018 07:35:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FreeRTOS-text-area-in-IMX7D-M4-TCM-memory/m-p/806854#M124517</guid>
      <dc:creator>andreas_vorderl</dc:creator>
      <dc:date>2018-09-10T07:35:03Z</dc:date>
    </item>
    <item>
      <title>Re: FreeRTOS .text area in IMX7D-M4 TCM memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FreeRTOS-text-area-in-IMX7D-M4-TCM-memory/m-p/806855#M124518</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Andreas:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;TCM_L is on&amp;nbsp; Code Bus, to Flash and to Code SRAM&lt;/P&gt;&lt;P&gt;TCM_H is on System Bus, to stack SRAM and to Periperals.&lt;/P&gt;&lt;P&gt;I think it is not good to store FreeRTOS code on both memory areas.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/68787i729ECB444C8223B9/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Sep 2018 02:35:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FreeRTOS-text-area-in-IMX7D-M4-TCM-memory/m-p/806855#M124518</guid>
      <dc:creator>danielchen</dc:creator>
      <dc:date>2018-09-12T02:35:24Z</dc:date>
    </item>
    <item>
      <title>Re: FreeRTOS .text area in IMX7D-M4 TCM memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FreeRTOS-text-area-in-IMX7D-M4-TCM-memory/m-p/806856#M124519</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Daniel,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks for the quick response.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you mean it is not a good idea to store them on both memory maps because of unpredictable processor behaviour?&lt;BR /&gt;Or do you have other Concerns?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Andreas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Sep 2018 05:43:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FreeRTOS-text-area-in-IMX7D-M4-TCM-memory/m-p/806856#M124519</guid>
      <dc:creator>andreas_vorderl</dc:creator>
      <dc:date>2018-09-12T05:43:32Z</dc:date>
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