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    <title>i.MX ProcessorsのトピックRe: How to change  dotclk phase</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-change-dotclk-phase/m-p/804216#M124201</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi David,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I believe, the parent clock is not mapped.&amp;nbsp; You need to set the parent for LDB_DI0_SEL.&lt;/P&gt;&lt;P&gt;In IPU clock selection section, add the below changes in "~/linux-imx/arch/arm/mach-imx/clk-imx6q.c" file.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class=""&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/TD&gt;&lt;TD&gt;/* ipu clock initialization */&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/TD&gt;&lt;TD&gt;imx_clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;or&lt;/P&gt;&lt;P&gt;One can look at &lt;CODE&gt;hsync-active,vsync-active in &amp;amp;lcdif {&lt;/CODE&gt;&lt;/P&gt;&lt;P&gt;&lt;A data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fgit.freescale.com%2Fgit%2Fcgit.cgi%2Fimx%2Flinux-2.6-imx.git%2Ftree%2Farch%2Farm%2Fboot%2Fdts%2Fimx6ul-14x14-evk.dts%3Fh%3Dimx_3.14.38_6ul_ga" rel="nofollow" target="_blank"&gt;linux-2.6-imx.git - Freescale i.MX Linux Tree&lt;/A&gt;&lt;/P&gt;&lt;P&gt;then add timings for syncs using as example lvds:&lt;/P&gt;&lt;P&gt;&lt;A data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fcommunity.freescale.com%2Fthread%2F373763" rel="nofollow" target="_blank"&gt;https://community.freescale.com/thread/373763&lt;/A&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 01 Aug 2018 15:02:34 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2018-08-01T15:02:34Z</dc:date>
    <item>
      <title>How to change  dotclk phase</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-change-dotclk-phase/m-p/804215#M124200</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;My board is i.Mx6DL, use lcd&amp;nbsp; 800x480，RGB data begins with the falling edge of dotclk，how can I change the pixclk phase? thanks&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Jul 2018 12:26:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-change-dotclk-phase/m-p/804215#M124200</guid>
      <dc:creator>davidfincher</dc:creator>
      <dc:date>2018-07-31T12:26:20Z</dc:date>
    </item>
    <item>
      <title>Re: How to change  dotclk phase</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-change-dotclk-phase/m-p/804216#M124201</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi David,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I believe, the parent clock is not mapped.&amp;nbsp; You need to set the parent for LDB_DI0_SEL.&lt;/P&gt;&lt;P&gt;In IPU clock selection section, add the below changes in "~/linux-imx/arch/arm/mach-imx/clk-imx6q.c" file.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class=""&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/TD&gt;&lt;TD&gt;/* ipu clock initialization */&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/TD&gt;&lt;TD&gt;imx_clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;or&lt;/P&gt;&lt;P&gt;One can look at &lt;CODE&gt;hsync-active,vsync-active in &amp;amp;lcdif {&lt;/CODE&gt;&lt;/P&gt;&lt;P&gt;&lt;A data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fgit.freescale.com%2Fgit%2Fcgit.cgi%2Fimx%2Flinux-2.6-imx.git%2Ftree%2Farch%2Farm%2Fboot%2Fdts%2Fimx6ul-14x14-evk.dts%3Fh%3Dimx_3.14.38_6ul_ga" rel="nofollow" target="_blank"&gt;linux-2.6-imx.git - Freescale i.MX Linux Tree&lt;/A&gt;&lt;/P&gt;&lt;P&gt;then add timings for syncs using as example lvds:&lt;/P&gt;&lt;P&gt;&lt;A data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fcommunity.freescale.com%2Fthread%2F373763" rel="nofollow" target="_blank"&gt;https://community.freescale.com/thread/373763&lt;/A&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Aug 2018 15:02:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-change-dotclk-phase/m-p/804216#M124201</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2018-08-01T15:02:34Z</dc:date>
    </item>
    <item>
      <title>Re: How to change  dotclk phase</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-change-dotclk-phase/m-p/804217#M124202</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank U.I changed it with videomode in mxc_lcdif.c&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 06 Aug 2018 05:11:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-change-dotclk-phase/m-p/804217#M124202</guid>
      <dc:creator>davidfincher</dc:creator>
      <dc:date>2018-08-06T05:11:48Z</dc:date>
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