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    <title>i.MX Processors中的主题 SDIO transfer modes</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SDIO-transfer-modes/m-p/801301#M123797</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is SPI bus mode supported in SDIO host controller for data transfer in iMx8 processors? We're currently in stage of board design and we need separate pins for input/output for SDIO. As far as I could understand only SPI transfer mode supports this.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 16 Dec 2018 09:11:31 GMT</pubDate>
    <dc:creator>syuriks</dc:creator>
    <dc:date>2018-12-16T09:11:31Z</dc:date>
    <item>
      <title>SDIO transfer modes</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDIO-transfer-modes/m-p/801301#M123797</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is SPI bus mode supported in SDIO host controller for data transfer in iMx8 processors? We're currently in stage of board design and we need separate pins for input/output for SDIO. As far as I could understand only SPI transfer mode supports this.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 16 Dec 2018 09:11:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDIO-transfer-modes/m-p/801301#M123797</guid>
      <dc:creator>syuriks</dc:creator>
      <dc:date>2018-12-16T09:11:31Z</dc:date>
    </item>
    <item>
      <title>Re: SDIO transfer modes</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDIO-transfer-modes/m-p/801302#M123798</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;unfortunately it is not supported (usdhc module is the same on i.MX8 processors)&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/69938i61069B532CBE3818/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.jpg" alt="pastedImage_1.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Dec 2018 23:29:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDIO-transfer-modes/m-p/801302#M123798</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-12-17T23:29:15Z</dc:date>
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