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  <channel>
    <title>i.MX ProcessorsのトピックThe SPI1 does not work</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/The-SPI1-does-not-work/m-p/801182#M123789</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sir,&lt;/P&gt;&lt;P&gt;We need to control SPI device via SPI1. However, it does not work well (the CLK always keeps in low). Do you have any ideas about that?&amp;nbsp; I can see these SPI nodes by &lt;SPAN style="color: #1f497d;"&gt;ls -al /sys/class/spidev/ command as below&lt;/SPAN&gt;:&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;root@imx8qxpmek:~# ls -al /sys/class/spidev/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;drwxr-xr-x&amp;nbsp;&amp;nbsp;&amp;nbsp; 2 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 .&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;drwxr-xr-x&amp;nbsp;&amp;nbsp; 63 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 ..&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;lrwxrwxrwx&amp;nbsp;&amp;nbsp;&amp;nbsp; 1 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 spidev32763.0 -&amp;gt; ../../devices/platform/5a030000.lpspi/spi_master/spi32763/spi32763.0/spidev/spidev32763.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;lrwxrwxrwx&amp;nbsp;&amp;nbsp;&amp;nbsp; 1 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 spidev32764.0 -&amp;gt; ../../devices/platform/5a020000.lpspi/spi_master/spi32764/spi32764.0/spidev/spidev32764.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;lrwxrwxrwx&amp;nbsp;&amp;nbsp; &amp;nbsp;1 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 spidev32765.0 -&amp;gt; ../../devices/platform/5a010000.lpspi/spi_master/spi32765/spi32765.0/spidev/spidev32765.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;lrwxrwxrwx&amp;nbsp;&amp;nbsp;&amp;nbsp; 1 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 spidev32766.0 -&amp;gt; ../../devices/platform/5a000000.lpspi/spi_master/spi32766/spi32766.0/spidev/spidev32766.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;root@imx8qxpmek:~#&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Below is what I configured in dts and dtsi files.&lt;/P&gt;&lt;P&gt;.dts file:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pinctrl_lpspi1: lpspi1grp {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; SC_P_SAI0_TXFS_ADMA_SPI1_SCK 0xD600004c&lt;BR /&gt; SC_P_SAI0_TXD_ADMA_SPI1_SDO 0xD600004c&lt;BR /&gt; SC_P_SAI0_TXC_ADMA_SPI1_SDI 0xD600004c&lt;BR /&gt; // SC_P_SAI0_RXD_ADMA_SPI1_CS0 0xD600004c&lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; pinctrl_lpspi1_cs: lpspi1cs {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; SC_P_SAI0_RXD_LSIO_GPIO0_IO27 0xE0000021 &lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;......&lt;/P&gt;&lt;P&gt;&amp;amp;lpspi1 {&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; fsl,spi-num-chipselects = &amp;lt;1&amp;gt;;&lt;BR /&gt; pinctrl-names = "default";&lt;BR /&gt; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_lpspi1 &amp;amp;pinctrl_lpspi1_cs&amp;gt;;&lt;BR /&gt; cs-gpios = &amp;lt;&amp;amp;gpio0 27 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt; status = "okay";&lt;BR /&gt; &lt;BR /&gt; spidev@0 {&lt;BR /&gt; compatible = "rohm,dh2228fv";&lt;BR /&gt; status = "okay";&lt;BR /&gt; spi-max-frequency = &amp;lt;1000000&amp;gt;;&lt;BR /&gt; reg = &amp;lt;0&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;dtsi file:&lt;/P&gt;&lt;P&gt;lpspi1: lpspi@5a010000 {&lt;BR /&gt; compatible = "fsl,imx7ulp-spi";&lt;BR /&gt; reg = &amp;lt;0x0 0x5a010000 0x0 0x10000&amp;gt;;&lt;BR /&gt; interrupts = &amp;lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;BR /&gt; interrupt-parent = &amp;lt;&amp;amp;gic&amp;gt;;&lt;BR /&gt; clocks = &amp;lt;&amp;amp;clk IMX8QXP_SPI1_CLK&amp;gt;,&lt;BR /&gt; &amp;lt;&amp;amp;clk IMX8QXP_SPI1_IPG_CLK&amp;gt;;&lt;BR /&gt; clock-names = "per", "ipg";&lt;BR /&gt; assigned-clocks = &amp;lt;&amp;amp;clk IMX8QXP_SPI1_CLK&amp;gt;;&lt;BR /&gt; assigned-clock-rates = &amp;lt;20000000&amp;gt;;&lt;BR /&gt; power-domains = &amp;lt;&amp;amp;pd_dma_lpspi1&amp;gt;;&lt;BR /&gt; status = "disabled";&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Kevin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 26 Nov 2018 07:03:51 GMT</pubDate>
    <dc:creator>kevinpwchen</dc:creator>
    <dc:date>2018-11-26T07:03:51Z</dc:date>
    <item>
      <title>The SPI1 does not work</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/The-SPI1-does-not-work/m-p/801182#M123789</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sir,&lt;/P&gt;&lt;P&gt;We need to control SPI device via SPI1. However, it does not work well (the CLK always keeps in low). Do you have any ideas about that?&amp;nbsp; I can see these SPI nodes by &lt;SPAN style="color: #1f497d;"&gt;ls -al /sys/class/spidev/ command as below&lt;/SPAN&gt;:&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;root@imx8qxpmek:~# ls -al /sys/class/spidev/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;drwxr-xr-x&amp;nbsp;&amp;nbsp;&amp;nbsp; 2 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 .&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;drwxr-xr-x&amp;nbsp;&amp;nbsp; 63 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 ..&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;lrwxrwxrwx&amp;nbsp;&amp;nbsp;&amp;nbsp; 1 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 spidev32763.0 -&amp;gt; ../../devices/platform/5a030000.lpspi/spi_master/spi32763/spi32763.0/spidev/spidev32763.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;lrwxrwxrwx&amp;nbsp;&amp;nbsp;&amp;nbsp; 1 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 spidev32764.0 -&amp;gt; ../../devices/platform/5a020000.lpspi/spi_master/spi32764/spi32764.0/spidev/spidev32764.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;lrwxrwxrwx&amp;nbsp;&amp;nbsp; &amp;nbsp;1 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 spidev32765.0 -&amp;gt; ../../devices/platform/5a010000.lpspi/spi_master/spi32765/spi32765.0/spidev/spidev32765.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;lrwxrwxrwx&amp;nbsp;&amp;nbsp;&amp;nbsp; 1 root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; root&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 Oct&amp;nbsp; 3 05:44 spidev32766.0 -&amp;gt; ../../devices/platform/5a000000.lpspi/spi_master/spi32766/spi32766.0/spidev/spidev32766.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;root@imx8qxpmek:~#&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Below is what I configured in dts and dtsi files.&lt;/P&gt;&lt;P&gt;.dts file:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pinctrl_lpspi1: lpspi1grp {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; SC_P_SAI0_TXFS_ADMA_SPI1_SCK 0xD600004c&lt;BR /&gt; SC_P_SAI0_TXD_ADMA_SPI1_SDO 0xD600004c&lt;BR /&gt; SC_P_SAI0_TXC_ADMA_SPI1_SDI 0xD600004c&lt;BR /&gt; // SC_P_SAI0_RXD_ADMA_SPI1_CS0 0xD600004c&lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; pinctrl_lpspi1_cs: lpspi1cs {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; SC_P_SAI0_RXD_LSIO_GPIO0_IO27 0xE0000021 &lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;......&lt;/P&gt;&lt;P&gt;&amp;amp;lpspi1 {&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; fsl,spi-num-chipselects = &amp;lt;1&amp;gt;;&lt;BR /&gt; pinctrl-names = "default";&lt;BR /&gt; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_lpspi1 &amp;amp;pinctrl_lpspi1_cs&amp;gt;;&lt;BR /&gt; cs-gpios = &amp;lt;&amp;amp;gpio0 27 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt; status = "okay";&lt;BR /&gt; &lt;BR /&gt; spidev@0 {&lt;BR /&gt; compatible = "rohm,dh2228fv";&lt;BR /&gt; status = "okay";&lt;BR /&gt; spi-max-frequency = &amp;lt;1000000&amp;gt;;&lt;BR /&gt; reg = &amp;lt;0&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;dtsi file:&lt;/P&gt;&lt;P&gt;lpspi1: lpspi@5a010000 {&lt;BR /&gt; compatible = "fsl,imx7ulp-spi";&lt;BR /&gt; reg = &amp;lt;0x0 0x5a010000 0x0 0x10000&amp;gt;;&lt;BR /&gt; interrupts = &amp;lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;BR /&gt; interrupt-parent = &amp;lt;&amp;amp;gic&amp;gt;;&lt;BR /&gt; clocks = &amp;lt;&amp;amp;clk IMX8QXP_SPI1_CLK&amp;gt;,&lt;BR /&gt; &amp;lt;&amp;amp;clk IMX8QXP_SPI1_IPG_CLK&amp;gt;;&lt;BR /&gt; clock-names = "per", "ipg";&lt;BR /&gt; assigned-clocks = &amp;lt;&amp;amp;clk IMX8QXP_SPI1_CLK&amp;gt;;&lt;BR /&gt; assigned-clock-rates = &amp;lt;20000000&amp;gt;;&lt;BR /&gt; power-domains = &amp;lt;&amp;amp;pd_dma_lpspi1&amp;gt;;&lt;BR /&gt; status = "disabled";&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Kevin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Nov 2018 07:03:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/The-SPI1-does-not-work/m-p/801182#M123789</guid>
      <dc:creator>kevinpwchen</dc:creator>
      <dc:date>2018-11-26T07:03:51Z</dc:date>
    </item>
    <item>
      <title>Re: The SPI1 does not work</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/The-SPI1-does-not-work/m-p/801183#M123790</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kevin,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Previously there is a typo in CLK driver, please check following changes is added:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="color: #1f497d; border: 0px; font-weight: inherit;"&gt;clk-imx8qxp.c&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="color: #1f497d; border: 0px; font-weight: inherit;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; margin: 0px 0px 0px 18pt;"&gt;&lt;SPAN style="color: #1f497d; border: 0px; font-weight: inherit;"&gt;clks[IMX8QXP_SPI1_CLK] = imx_clk_gate_scu("spi1_clk", "spi1_div", SC_R_SPI_2, SC_PM_CLK_PER, (void __iomem *)(LPSPI_1_LPCG), 0, 0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; margin: 0px 0px 0px 18pt;"&gt;&lt;SPAN style="color: #1f497d; border: 0px; font-weight: inherit;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; margin: 0px 0px 0px 18pt;"&gt;&lt;SPAN style="color: #1f497d; border: 0px; font-weight: inherit;"&gt;change to :&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; margin: 0px 0px 0px 18pt;"&gt;&lt;SPAN style="color: #1f497d; border: 0px; font-weight: inherit;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; margin: 0px 0px 0px 18pt;"&gt;&lt;SPAN style="color: #1f497d; border: 0px; font-weight: inherit;"&gt;clks[IMX8QXP_SPI1_CLK] = imx_clk_gate_scu("spi1_clk", "spi1_div", SC_R_SPI_&lt;/SPAN&gt;&lt;SPAN style="color: red; border: 0px; font-weight: inherit;"&gt;1,&lt;/SPAN&gt;&lt;SPAN style="color: #1f497d; border: 0px; font-weight: inherit;"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;SC_PM_CLK_PER, (void __iomem *)(LPSPI_1_LPCG), 0, 0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; margin: 0px 0px 0px 18pt;"&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; margin: 0px 0px 0px 18pt;"&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Danwei&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 Nov 2018 08:03:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/The-SPI1-does-not-work/m-p/801183#M123790</guid>
      <dc:creator>danwei_luo</dc:creator>
      <dc:date>2018-11-28T08:03:03Z</dc:date>
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