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    <title>i.MX ProcessorsのトピックRe: i.mx6q GPIOs generate core interrupt</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6q-GPIOs-generate-core-interrupt/m-p/795233#M123119</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Jie Zou,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can find the ARM Cortex A9 domain interrupt summary on Table 3-1 of the i.MX6 Reference Manual. You can use the GPIO signals to generate a Core Interrupt, and you can setup the interrupt trigger to low/high level or falling/rising edge on the GPIO interrupt configuration register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps,&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 27 Nov 2018 17:20:44 GMT</pubDate>
    <dc:creator>gusarambula</dc:creator>
    <dc:date>2018-11-27T17:20:44Z</dc:date>
    <item>
      <title>i.mx6q GPIOs generate core interrupt</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6q-GPIOs-generate-core-interrupt/m-p/795232#M123118</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; As IMX6DQRM_revC says that GPIO peripheral can produce core interrupt. Does this mean all the GPIO pins support by i.mx6q are edge senstive and able to generate interuput to arm core?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Nov 2018 06:12:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6q-GPIOs-generate-core-interrupt/m-p/795232#M123118</guid>
      <dc:creator>cgperson</dc:creator>
      <dc:date>2018-11-23T06:12:47Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6q GPIOs generate core interrupt</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6q-GPIOs-generate-core-interrupt/m-p/795233#M123119</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Jie Zou,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can find the ARM Cortex A9 domain interrupt summary on Table 3-1 of the i.MX6 Reference Manual. You can use the GPIO signals to generate a Core Interrupt, and you can setup the interrupt trigger to low/high level or falling/rising edge on the GPIO interrupt configuration register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps,&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 27 Nov 2018 17:20:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6q-GPIOs-generate-core-interrupt/m-p/795233#M123119</guid>
      <dc:creator>gusarambula</dc:creator>
      <dc:date>2018-11-27T17:20:44Z</dc:date>
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