<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: USB 3.0 Raw Throughput in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791530#M122634</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; the following may be useful.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/1092076"&gt;https://community.nxp.com/message/1092076&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 19 Dec 2018 03:06:20 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2018-12-19T03:06:20Z</dc:date>
    <item>
      <title>USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791519#M122623</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I loaded g_serial gadget driver to enumerate in device mode using&lt;/P&gt;&lt;P&gt;modprobe g_serial use_acm=0 idVendor=0xABCD idProduct=0xABCD&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I wrote a console app in windows which uses WinUSB library to receive the data in a tight loop from the device(sending in a&amp;nbsp;tight loop)&lt;/P&gt;&lt;P&gt;When connected with 2.0 cable I can see throughput as 45 MBps which is close to theoretical&amp;nbsp;values.&lt;/P&gt;&lt;P&gt;But when connected with 3.0 cable throughput just reaches 80 MBps.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I need help knowing what's the bottleneck (g_serial or Windows Host)?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Since I have two iMX8M boards, I thought of eliminating windows and make one board act as host to other.&lt;/P&gt;&lt;P&gt;Yocto-Image used: core-image-base with libusb1 appended&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;wrote a console app (Host side) which uses LibUSB-1.0 library to receive the data in a tight loop from the device(sending in a&amp;nbsp;tight loop).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;When connected with 2.0 cable I can see throughput as just 6 Mbps and see following error&amp;nbsp;continuously&amp;nbsp;popping on&amp;nbsp;the terminal.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;"xhci-hcd xhci-hcd.0.auto: WARN Event TRB for slot 3 ep 2 with no TDs queued?0 &amp;gt; 0"&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;And when the error messages&amp;nbsp;stop, I see throughput hit 45 MBps.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;This repeats : Error messages for some time and stops and then start again.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Find the attachments for host-side and device-side code and block diagram of the setup.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Board: iMX8M&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Dec 2018 20:43:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791519#M122623</guid>
      <dc:creator>bharatkumarbach</dc:creator>
      <dc:date>2018-12-12T20:43:28Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791520#M122624</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Bharat&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;seems processor arbiters NOC/NIC settings were not optimized for that module, also&lt;/P&gt;&lt;P&gt;one can test with unit tests:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/imx-test/tree/test/mxc_usb_test/doc/043-Performance-Test.txt?h=imx_4.9.88_2.0.0_ga" title="https://source.codeaurora.org/external/imx/imx-test/tree/test/mxc_usb_test/doc/043-Performance-Test.txt?h=imx_4.9.88_2.0.0_ga"&gt;043-Performance-Test.txt\doc\mxc_usb_test\test - imx-test - i.MX Driver Test Application Software&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Dec 2018 23:21:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791520#M122624</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-12-13T23:21:25Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791521#M122625</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Why do I have to care about NOC/NIC settings when USB ports are connected directly (no intentions to use g_ether).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The expected result of the performance test you suggested is 15 MBps. Already seeing 80 MBps, trying to achieve speeds around 3-4 Gbps&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Dec 2018 16:21:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791521#M122625</guid>
      <dc:creator>bharatkumarbach</dc:creator>
      <dc:date>2018-12-14T16:21:49Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791522#M122626</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;suggestion was to use mass storage test with "dd", not g_ether.&lt;/P&gt;&lt;P&gt;NOC/NIC settings defines how data from usb module passes through processor buses.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For example below i.MX6Q NIC-301 Bus System, i.MX8M has much complex diagram&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/69887i5801EFC05C50A149/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.jpg" alt="pastedImage_1.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 15 Dec 2018 00:01:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791522#M122626</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-12-15T00:01:58Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791523#M122627</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; Respectfully, you are not giving precise answers.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;NOC/NIC settings defines how data from usb module passes through processor buses&lt;/SPAN&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;STRONG&gt;(1) Which settings?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Furthermore,&amp;nbsp;you linked to unit tests with expected results of&amp;nbsp;15MB/sec; why?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My colleague has achieved&amp;nbsp;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;80 MBps,&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;so how is 15MB/sec relevant to him?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;He is trying to achieve speeds around 3-4 Gbps&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Furthermore, why have&amp;nbsp;&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;you&lt;/STRONG&gt;&lt;/SPAN&gt; marked the question as "Assumed Answered"?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;It is up to the poster to mark it as answered.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Please change it back to "Unanswered" and let the poster tell you when he thinks the question is answered.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Dec 2018 17:31:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791523#M122627</guid>
      <dc:creator>amuresan</dc:creator>
      <dc:date>2018-12-17T17:31:50Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791525#M122629</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you for that download.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The way I understand the phrase “bus arbiter” is that arbitration has to occur between peripherals for access to send data to/from the ARM core.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If the only peripheral active is USB, then USB is not competing with any other peripheral for bus access so arbitration is not an issue.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Therefore, why are the bus arbiter settings relevant in this discussion of USB 3.0 throughput?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Where is the competition for bus access happening?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Dec 2018 05:52:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791525#M122629</guid>
      <dc:creator>amuresan</dc:creator>
      <dc:date>2018-12-18T05:52:01Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791526#M122630</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt; arbitration has to occur between peripherals for access to send data to/from the ARM core.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;not sorry. Data from/to usb module passes to memory also through bus arbiters&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Where is the competition for bus access happening?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;arbiters can be configured for different policies, so that one bus master does not hold&lt;/P&gt;&lt;P&gt;whole bus, leaving some predefined bandwidth for other masters (even they are not working at all).&lt;/P&gt;&lt;P&gt;Just for reference one can look at arm NIC301 documentation&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://static.docs.arm.com/ddi0397/g/DDI0397G_amba_network_interconnect_nic301_r2p1_trm.pdf" title="https://static.docs.arm.com/ddi0397/g/DDI0397G_amba_network_interconnect_nic301_r2p1_trm.pdf"&gt;https://static.docs.arm.com/ddi0397/g/DDI0397G_amba_network_interconnect_nic301_r2p1_trm.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Most full description how bus arbiters work is provided in Chapter 45 Network Interconnect Bus System (NIC-301)&lt;/P&gt;&lt;P&gt;i.MX6DQ Reference Manual &lt;/P&gt;&lt;P&gt;&lt;A href="http://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf"&gt;http://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;i.MX8M has similar bus arbitration scheme, but more complicated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Dec 2018 06:14:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791526#M122630</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-12-18T06:14:48Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791527#M122631</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We need to understand the USB 3.0 capabilities of this processor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you provide a flash image and source code that is optimized for maximum usb 3.0 throughput?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Even if all other peripherals have to be turned off, we would still find this sample flash image very useful as it would give us a ceiling for usb 3.0&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Dec 2018 06:23:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791527#M122631</guid>
      <dc:creator>amuresan</dc:creator>
      <dc:date>2018-12-18T06:23:22Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791528#M122632</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt;Can you provide a flash image and source code that is optimized for maximum usb 3.0 throughput?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;sorry such image is not available. One can try to test this on i.MX8M EVK NXP reference board&lt;/P&gt;&lt;P&gt;with Linux Binary Demo Files - i.MX 8MQuad EVK&lt;/P&gt;&lt;P&gt;&lt;A data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fwebapp%2FDownload%3FcolCode%3DL4.9.88_2.0.0_MX8MQ%26appType%3Dlicense%26location%3Dnull" rel="nofollow" target="_blank"&gt;https://www.nxp.com/webapp/Download?colCode=L4.9.88_2.0.0_MX8MQ&amp;amp;appType=license&amp;amp;location=null&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Dec 2018 07:36:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791528#M122632</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-12-18T07:36:38Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791529#M122633</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt;phrase “bus arbiter” is that arbitration has to occur between peripherals for access to send data to/from the ARM&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;not sorry. Not only to/from the ARM.&lt;/P&gt;&lt;P&gt;Between any peripherals.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Dec 2018 02:05:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791529#M122633</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-12-19T02:05:02Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791530#M122634</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; the following may be useful.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/1092076"&gt;https://community.nxp.com/message/1092076&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Dec 2018 03:06:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791530#M122634</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-12-19T03:06:20Z</dc:date>
    </item>
    <item>
      <title>Re: USB 3.0 Raw Throughput</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791531#M122635</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have performed the tests recommended by &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/igorpadykov"&gt;igorpadykov&lt;/A&gt;‌ and seen the read throughput from 150-170 MBps.&lt;/P&gt;&lt;P&gt;Note: No bottleneck from the hard drive I used as it can do 400+ MBps&lt;/P&gt;&lt;P&gt;Now I am truly interested to know the internal characterization USB speeds at NXP.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/YuriMuhin_ng"&gt;YuriMuhin_ng&lt;/A&gt;‌ :&amp;nbsp;&lt;A href="https://community.nxp.com/thread/490721"&gt;USB 3.0 performance on iMX8M&lt;/A&gt;&amp;nbsp; gives me no answer except that we have to propose NXP professional services to achieve more speeds than 170 MBps.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks and Regards,&lt;/P&gt;&lt;P&gt;Bharat&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Dec 2018 16:42:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/USB-3-0-Raw-Throughput/m-p/791531#M122635</guid>
      <dc:creator>bharatkumarbach</dc:creator>
      <dc:date>2018-12-20T16:42:16Z</dc:date>
    </item>
  </channel>
</rss>

