topic Is bt.656 the only timing mode when using V4L2 Capture in i.MX Processors

Is bt.656 the only timing mode when using V4L2 Capture

axellagrange — Wed, 15 Nov 2017 16:42:50 GMT

Hello,

In media/platform/mxc/capture/v4l2-int-device.h, there is only one input format defined : V4L2_IF_TYPE_BT656.

Does this means that the only timing mode for CSI is BT.656 mode when using the imx6q-v4l2-capture IPU driver?

How to deal with a sensor camera connected to CSI in gated mode ie with HSync VSync?

Note : I use the terms BT.656 mode and gated mode as described into the IMX6DQRM

Thank you

Re: Is bt.656 the only timing mode when using V4L2 Capture

joanxie — Tue, 21 Nov 2017 03:25:00 GMT

"How to deal with a sensor camera connected to CSI in gated mode ie with HSync VSync?" what mode do you need? bt656 mode or gated mode? do you need to capture bt656 in gated mode?? de-interlacing?

Re: Is bt.656 the only timing mode when using V4L2 Capture

axellagrange — Tue, 21 Nov 2017 15:42:55 GMT

I found my answer : into mxc_v4l2_capture.c, bt656.clock_curr != 0 configures CSI in gated mode.

Re: Is bt.656 the only timing mode when using V4L2 Capture

joanxie — Thu, 23 Nov 2017 03:51:41 GMT

yes, if you want to use gated mode, you can modify this source code, if you want to use bt656 progressive mode, you can change the "INTERLACED" to "PROGRESSIVE"

if (ifparm.u.bt656.clock_curr == 0)

csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED;

else

csi_param.clk_mode = IPU_CSI_CLK_MODE_GATED_CLK;