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    <title>topic i.MX 6 IPU interrupt control in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX-6-IPU-interrupt-control/m-p/779849#M121166</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about IPUx_INT_CTLR_15 and IPUx_INT_STAT_15 register.&lt;/P&gt;&lt;P&gt;There is a bit DI0_CNT_EN_PRE_0_EN and DI0_CNT_EN_PRE_0 in 18th, but table 37-35&amp;nbsp;Functional Interrupts Summary sees like below.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/34830i97A108A25289862B/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Which name is correct?&lt;/P&gt;&lt;P&gt;What for this interrupt?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Sugiyama&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 02 Feb 2018 01:48:22 GMT</pubDate>
    <dc:creator>sugiyamatoshihi</dc:creator>
    <dc:date>2018-02-02T01:48:22Z</dc:date>
    <item>
      <title>i.MX 6 IPU interrupt control</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX-6-IPU-interrupt-control/m-p/779849#M121166</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about IPUx_INT_CTLR_15 and IPUx_INT_STAT_15 register.&lt;/P&gt;&lt;P&gt;There is a bit DI0_CNT_EN_PRE_0_EN and DI0_CNT_EN_PRE_0 in 18th, but table 37-35&amp;nbsp;Functional Interrupts Summary sees like below.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/34830i97A108A25289862B/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Which name is correct?&lt;/P&gt;&lt;P&gt;What for this interrupt?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Sugiyama&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 02 Feb 2018 01:48:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX-6-IPU-interrupt-control/m-p/779849#M121166</guid>
      <dc:creator>sugiyamatoshihi</dc:creator>
      <dc:date>2018-02-02T01:48:22Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX 6 IPU interrupt control</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX-6-IPU-interrupt-control/m-p/779850#M121167</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please refer chapter 37.5.20 Interrupt Control Register15 (IPUx_INT_CTRL_15) of i.MX 6Dual/6Quad Processor Reference Manual.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Victor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 16 Feb 2018 02:31:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX-6-IPU-interrupt-control/m-p/779850#M121167</guid>
      <dc:creator>b36401</dc:creator>
      <dc:date>2018-02-16T02:31:10Z</dc:date>
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