topic imx6q,eim port not working in i.MX Processors

imx6q,eim port not working

liupeiliu — Tue, 09 Jan 2018 02:48:47 GMT

i use imx6q board,Link board to fpga, here is my configuration

i use copy_from_user,copy_to_user for read and write，

before connect to fpga, i test the eim port,but there is no signals，what can i do to solve this problem??

linux-3.0.35

CS0GCR1:
GBC=0;CSREC=1;DSZ=2;BL=0;
CREP=1;CSEN=1;
Operation Mode: MUM=SRD=SWR=0.
(Async write/Async page read,none multiplexed)
*/
writel(0x00120081, ram_reg);//EIM_CS0GCR1
/*
ADH=0
*/
writel(0x00000000, ram_reg + 0x4); //EIM_CS0GCR2
/*
CS0RCR1:
RWSC=1;//28
RADVA=0;RADVN=0;
OEA=0;OEN=0;
RCSA=0;RCSN=0;
*/
writel(0x01000000, ram_reg + 0x8);//EIM_CS0RCR1
/*
CS0RCR2:
APR=1(Async Page Read);
PAT=4(6 EIM clock syclks)
changed RWSC=4,OEA=0,PAT=2;
*/
writel(0x0000c000, ram_reg + 0xc);//EIM_CS0RCR2
/*
CS0WCR1:
WWSC=1;
WADVA=0;WADVN=0;
WBEA=0;WBEN=0;
WEA=0;WEN=0;
WCSA=0;WCSN=0;
*/
writel(0x01000000, ram_reg + 0x10);//EIM_CS0WCR1 WWSC=3 EIM clk

/*WBCDD=0*/

writel(0x00000000, ram_reg + 0x14);
writel(0x00000000, ram_reg + 0x090);
//init pad
mxc_iomux_v3_setup_multiple_pads(mx6q_weimram_pads,ARRAY_SIZE(mx6q_weimram_pads));

Re: imx6q,eim port not working

Rita_Wang — Tue, 09 Jan 2018 06:34:07 GMT

Hi,

You can refer to the thread Reading data from an FPGA connected to the iMX6q EIM bus .
Have a great day,
TIC Rita

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Re: imx6q,eim port not working

liupeiliu — Tue, 09 Jan 2018 07:27:25 GMT

what does step1 mean? i could not find it, could you give me more detail explanation,please

Step 1: Build the Ltib with Sabre-AI_weimnor u-boot and Sabre-AI kernel.

Assert the following in the kernel configuration

CONFIG_MTD_ROM=y

and make sure,

CONFIG_MTD_PHYSMAP=y