Output 125MHz vs. 100MHz for PCIe

cbobek — Wed, 25 Apr 2018 19:44:37 GMT

Hi Community,

On our Linux 3.x kernel, our PCIe bus works and outputs 125MHz on the CLK1_P and CLK1_N pins, which is what we want. When we migrated to the Linux 4.9 kernel, the PCIe bus works, but it outputs a 100MHz clock.

When we modified the clk-imx6q.c file to output the 125MHz clock, the clock was correct, but Linux hung during boot as shown below. Does anybody have any suggestions on how to set this configuration up in Linux 4.9?

---------- clk-imx6q.c change ------------

if (IS_ENABLED(CONFIG_PCI_IMX6)) {

//clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);

clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_PCIE_REF_125M]);

---------- Linux 4.9 crash during boot -------------

...

io scheduler noop registered

io scheduler deadline registered

io scheduler cfq registered (default)

OF: PCI: host bridge /soc/pcie@0x01000000 ranges:

OF: PCI: No bus range found for /soc/pcie@0x01000000, using [bus 00-ff]

OF: PCI: IO 0x01f80000..0x01f8ffff -> 0x00000000

OF: PCI: MEM 0x01000000..0x01efffff -> 0x01000000

Thank you,

Chris

Re: Output 125MHz vs. 100MHz for PCIe

Yuri — Fri, 04 May 2018 07:05:10 GMT

Hello,

According to the following Community thread Setting the iMX6 PCIe Clocks :

The ENET PLL (PLL6) 100 MHz (SATA) PFD output MUST be enabled in order to access

the registers in the PCIe IP block.

The following also may be useful:

question about imx6 pcie's frequency/clock

https://community.nxp.com/message/640518

Have a great day,
Yuri

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i.MX ProcessorsのトピックOutput 125MHz vs. 100MHz for PCIe

Output 125MHz vs. 100MHz for PCIe

Re: Output 125MHz vs. 100MHz for PCIe