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    <title>i.MX ProcessorsのトピックRe: Using a LPSR GPIO Pad as a GPIO</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Using-a-LPSR-GPIO-Pad-as-a-GPIO/m-p/760775#M118216</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for pointing me to some documentation.&amp;nbsp; That was helpful to see that for&amp;nbsp;last integer, CONFIG:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;NO_PAD_CTL(1 &amp;lt;&amp;lt; 31): indicate this pin does not need config&lt;/LI&gt;&lt;LI&gt;SION(1 &amp;lt;&amp;lt; 30): Software Input On FieldSION(1 &amp;lt;&amp;lt; 30): Software Input On Field&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So it looks like my configuration is correct and now I know more about configuring iomux pads.&amp;nbsp; Looking more at the documentation for our SoM I also learned that that pad isn't available with our current configuration.&amp;nbsp; Thanks for the help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;James&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 04 Apr 2018 15:53:34 GMT</pubDate>
    <dc:creator>jamesburnworth</dc:creator>
    <dc:date>2018-04-04T15:53:34Z</dc:date>
    <item>
      <title>Using a LPSR GPIO Pad as a GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-a-LPSR-GPIO-Pad-as-a-GPIO/m-p/760773#M118214</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to configure the imx7 pad GPIO1_IO01 as a GPIO.&amp;nbsp; We have a custom base board for the iMX7D and have other, non-lpsr, GPIO working ( I can toggle them and read their values from /sys/class/gpio).&amp;nbsp; Here's a snippet from my device tree where I try to configure GPIO1_IO01 as a GPIO input with no pull and normal drive strength, no hysteresis, and fast slew.&amp;nbsp;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&amp;amp;iomuxc_lpsr {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-names = "default";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_gpio_lpsr&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;epilog-cs-overboard {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl_gpio_lpsr: gpiogrp-lpsr {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;fsl,pins = &amp;lt;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX7D_PAD_GPIO1_IO01__GPIO1_IO1 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x00&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;BR /&gt;};&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;When I read the value in /sys/class/gpio/gpio1 I always read 0 whether I pull it to ground or +3.3 V.&amp;nbsp; Do I need to do anything different for a LPSR pad in the device tree?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, in other device trees I've seen lines like this for lpsr pads:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;MX7D_PAD_GPIO1_IO07__I2C2_SDA 0x4000000f&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;What does the 0x4000000f do?&amp;nbsp; I thought the last value was only for pad control and could thus at most be 0x7f.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for the time.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;James&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Apr 2018 22:36:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-a-LPSR-GPIO-Pad-as-a-GPIO/m-p/760773#M118214</guid>
      <dc:creator>jamesburnworth</dc:creator>
      <dc:date>2018-04-03T22:36:52Z</dc:date>
    </item>
    <item>
      <title>Re: Using a LPSR GPIO Pad as a GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-a-LPSR-GPIO-Pad-as-a-GPIO/m-p/760774#M118215</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi James&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;0x40000000 is SION bit described in linux/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt&lt;/P&gt;&lt;P&gt;also one can check imx7d-pinctrl.txt:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga" title="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga"&gt;linux-imx.git - i.MX Linux Kernel&lt;/A&gt;&amp;nbsp;&lt;BR /&gt;&lt;A href="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga"&gt;http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga&lt;/A&gt;&lt;/P&gt;&lt;P&gt;in imx7d-sdb.dts that pad used as : MX7D_PAD_GPIO1_IO01__PWM1_OUT&lt;BR /&gt;&lt;A href="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx7d-sdb.dts?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga"&gt;http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx7d-sdb.dts?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Apr 2018 07:54:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-a-LPSR-GPIO-Pad-as-a-GPIO/m-p/760774#M118215</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-04-04T07:54:36Z</dc:date>
    </item>
    <item>
      <title>Re: Using a LPSR GPIO Pad as a GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-a-LPSR-GPIO-Pad-as-a-GPIO/m-p/760775#M118216</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for pointing me to some documentation.&amp;nbsp; That was helpful to see that for&amp;nbsp;last integer, CONFIG:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;NO_PAD_CTL(1 &amp;lt;&amp;lt; 31): indicate this pin does not need config&lt;/LI&gt;&lt;LI&gt;SION(1 &amp;lt;&amp;lt; 30): Software Input On FieldSION(1 &amp;lt;&amp;lt; 30): Software Input On Field&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So it looks like my configuration is correct and now I know more about configuring iomux pads.&amp;nbsp; Looking more at the documentation for our SoM I also learned that that pad isn't available with our current configuration.&amp;nbsp; Thanks for the help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;James&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Apr 2018 15:53:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-a-LPSR-GPIO-Pad-as-a-GPIO/m-p/760775#M118216</guid>
      <dc:creator>jamesburnworth</dc:creator>
      <dc:date>2018-04-04T15:53:34Z</dc:date>
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