topic Re: IMX6Solo Deep sleep issue? in i.MX Processors

IMX6Solo Deep sleep issue?

ramesh6663 — Thu, 09 Nov 2017 12:45:04 GMT

We are facing 2 issues in our IMX6solo customised board.

Failure to resume from a Deep Sleep Mode
High Current in Deep Sleep Mode (~60mA)

After we checked the PMIC power rails with Reference design,

we found VIN3 in our design used 3.3V as input which was generated SW2 of the PMIC. We are taking the VDDHIGH_IN O/P power from VGEN6. So this may cause the issue?

VIN3 also need to be power SYS_4V2 ??? as like all Switching regulator input?

Please find the snap shot of PMIC circuitry design of our project.

Re: IMX6Solo Deep sleep issue?

igorpadykov — Thu, 09 Nov 2017 23:26:18 GMT

Hi ramesh

please check sect.2.7 Measuring points on the Freescale SABRE SD platform

AN4715 i.MX 6Solo Power Consumption Measurement

https://www.nxp.com/docs/en/application-note/AN4715.pdf

for correct measurements, to check if ~60mA is for all board.

> we found VIN3 in our design used 3.3V as input which was generated SW2 of the PMIC.

>We are taking the VDDHIGH_IN O/P power from VGEN6. So this may cause the issue?

I do not think so

Best regards
igor
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Re: IMX6Solo Deep sleep issue?

ramesh6663 — Wed, 15 Nov 2017 06:50:36 GMT

Hi Igor,

Thanks for your help.

Regards,

Rameshkumar