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    <title>topic Question on i.MX6's PCIe RX in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759604#M118090</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a problem in receiving data over PCIe from EP device. (TX is Okay.)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How can I know the RX status?&lt;/P&gt;&lt;P&gt;Is there any register (or something like that) for debugging?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 26 Jan 2018 02:03:50 GMT</pubDate>
    <dc:creator>t_kuha</dc:creator>
    <dc:date>2018-01-26T02:03:50Z</dc:date>
    <item>
      <title>Question on i.MX6's PCIe RX</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759604#M118090</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a problem in receiving data over PCIe from EP device. (TX is Okay.)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How can I know the RX status?&lt;/P&gt;&lt;P&gt;Is there any register (or something like that) for debugging?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 26 Jan 2018 02:03:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759604#M118090</guid>
      <dc:creator>t_kuha</dc:creator>
      <dc:date>2018-01-26T02:03:50Z</dc:date>
    </item>
    <item>
      <title>Re: Question on i.MX6's PCIe RX</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759605#M118091</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi t_kuha&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;in general may be recommended to perform pcie compliance tests:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-95554"&gt;QA: About i.Mx6 PCIe compliance&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-94923"&gt;How to setup i.MX6Dual/Quad and i.MX6Solo/DualLite Linux software for PCIe compliance Test?&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am afraid there is no way to know the RX status from i.MX6 side, except measuring its level with special equipment.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Jan 2018 23:34:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759605#M118091</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-01-29T23:34:37Z</dc:date>
    </item>
    <item>
      <title>Re: Question on i.MX6's PCIe RX</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759606#M118092</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;igor, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for the reply.&lt;/P&gt;&lt;P&gt;Is there any examples of i.MX6 (RC) receiving Memory Write TLP from EP device?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Feb 2018 09:15:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759606#M118092</guid>
      <dc:creator>t_kuha</dc:creator>
      <dc:date>2018-02-15T09:15:23Z</dc:date>
    </item>
    <item>
      <title>Re: Question on i.MX6's PCIe RX</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759607#M118093</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi t_kuha&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can look at examples on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-95014"&gt;https://community.nxp.com/docs/DOC-95014&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Feb 2018 23:27:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-on-i-MX6-s-PCIe-RX/m-p/759607#M118093</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-02-15T23:27:26Z</dc:date>
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