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    <title>topic  PCB layout reference with the MCP DDR and EMMC combo memory in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/PCB-layout-reference-with-the-MCP-DDR-and-EMMC-combo-memory/m-p/758633#M117960</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I use IMX7d for Android device with the MCP DDR and EMMC combo memory.&amp;nbsp; we found NXP IMX7D demo board is DDR and EMMC separate chips. Can NXP provide any PCB layout reference design with 8 layers used the combo memory?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 03 Apr 2018 09:31:28 GMT</pubDate>
    <dc:creator>kangjianwei</dc:creator>
    <dc:date>2018-04-03T09:31:28Z</dc:date>
    <item>
      <title>PCB layout reference with the MCP DDR and EMMC combo memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCB-layout-reference-with-the-MCP-DDR-and-EMMC-combo-memory/m-p/758633#M117960</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I use IMX7d for Android device with the MCP DDR and EMMC combo memory.&amp;nbsp; we found NXP IMX7D demo board is DDR and EMMC separate chips. Can NXP provide any PCB layout reference design with 8 layers used the combo memory?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Apr 2018 09:31:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCB-layout-reference-with-the-MCP-DDR-and-EMMC-combo-memory/m-p/758633#M117960</guid>
      <dc:creator>kangjianwei</dc:creator>
      <dc:date>2018-04-03T09:31:28Z</dc:date>
    </item>
    <item>
      <title>Re:  PCB layout reference with the MCP DDR and EMMC combo memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCB-layout-reference-with-the-MCP-DDR-and-EMMC-combo-memory/m-p/758634#M117961</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Kang Jianwei,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I’m afraid there is nor a Reference Design that has these characteristics.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Apr 2018 20:13:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCB-layout-reference-with-the-MCP-DDR-and-EMMC-combo-memory/m-p/758634#M117961</guid>
      <dc:creator>gusarambula</dc:creator>
      <dc:date>2018-04-13T20:13:50Z</dc:date>
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