topic i.mx6 Single SSI Port for Two usersapce Application and PCM Data loop back in i.MX Processors

i.mx6 Single SSI Port for Two usersapce Application and PCM Data loop back

jegathesanshanm — Tue, 07 Nov 2017 15:18:07 GMT

Hello All,

#IMX6DQRM has three #SSI Interface. I want to use only one of the SSI port(i.e SSI3) for two userspace #Alsa application in loopback mode, As shown in Figure.

Is it possible to route the data using SSI Network mode?

Note: I'm trying use only one AUDMUX Internal port(PORT 7) for loopback.

Any comments or suggestions are highly appreciated.

cheers,

Jegathesan S

Re: i.mx6 Single SSI Port for Two usersapce Application and PCM Data loop back

igorpadykov — Tue, 07 Nov 2017 23:04:31 GMT

Hi Jegathesan

I am afraid full loopback is not possible as SSI-AUDMUX connection

has one receive and one transmit data, as for example depicted on

AN2628 Programming Audio Applications, Figure 1 SSI and AUDMUX Port Arrangements
https://www.nxp.com/docs/en/application-note/AN2628.pdf

Best regards
igor
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Re: i.mx6 Single SSI Port for Two usersapce Application and PCM Data loop back

jegathesanshanm — Wed, 08 Nov 2017 04:20:08 GMT

Hello igorpadykov,

Thank you for the information. According to the IMX6DQRM Datasheet, The SSI Provides 2 sets of Transmit and Receive FIFOs. Each of the four FIFOs is 15x32 bits. The two sets of Tx/Rx FIFOs can be used in Network mode to provide 2 independent channels for transmission and reception. But, It has only one Transmit Shift Register (TXSR) and Receive Shift Register.

Will SSI take care of two application date simultaneously in network mode?

Is there any example of network mode with i.MX6 SSI?

Re: i.mx6 Single SSI Port for Two usersapce Application and PCM Data loop back

igorpadykov — Wed, 08 Nov 2017 07:35:53 GMT

Hi Jegathesan

I am not aware of network example. Yes there are 2 sets of Transmit and Receive FIFOs

but only one receive and one transmit data as depicted on Figure 61-1.

SSI Block Diagram i.MX6DQ Reference Manual.

Description of operation is provided in sect.61.9.1 SSI Transmit Data Register n (SSIx_STXn) :
If both FIFOs are in use, data is alternately transferred from STX0 and STX1, to TXSR.
Data written to these registers is transferred to the Transmit Shift Register (TXSR)..

Best regards
igor