<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: CM4 access fpga by eim in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/CM4-access-fpga-by-eim/m-p/751235#M116928</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,igor&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; Thanks for your patience! The problem that how CM4 accesses EIM has been solved!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 28 Dec 2017 08:22:57 GMT</pubDate>
    <dc:creator>jingyangxie</dc:creator>
    <dc:date>2017-12-28T08:22:57Z</dc:date>
    <item>
      <title>CM4 access fpga by eim</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/CM4-access-fpga-by-eim/m-p/751233#M116926</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;I used a imx6sx-sdb custom board,want to use M4 to access fpga by eim,when I read or wrote(using address range 0x04000000~0x07FFFFF) ,no matter what address I gave, the address collected by FPGA was always 0.but the cs、rw、oe signals were right,and the data on the data bus was&amp;nbsp;also correct.Can anyone knows what is the problem?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Dec 2017 03:48:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/CM4-access-fpga-by-eim/m-p/751233#M116926</guid>
      <dc:creator>jingyangxie</dc:creator>
      <dc:date>2017-12-28T03:48:06Z</dc:date>
    </item>
    <item>
      <title>Re: CM4 access fpga by eim</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/CM4-access-fpga-by-eim/m-p/751234#M116927</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi jingyang&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can check IOMUXC_GPR_GPR1 register which&lt;/P&gt;&lt;P&gt;configures eim memory between CSn. Test with a9 using&lt;/P&gt;&lt;P&gt;imx6sx-19x19-arm2.dts (it has enabled eim)&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6sx-19x19-arm2.dts?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga" title="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6sx-19x19-arm2.dts?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga"&gt;linux-imx.git - i.MX Linux Kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;and if it is working, printf eim registers and reuse them with m4.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Dec 2017 06:53:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/CM4-access-fpga-by-eim/m-p/751234#M116927</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-12-28T06:53:02Z</dc:date>
    </item>
    <item>
      <title>Re: CM4 access fpga by eim</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/CM4-access-fpga-by-eim/m-p/751235#M116928</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,igor&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; Thanks for your patience! The problem that how CM4 accesses EIM has been solved!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Dec 2017 08:22:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/CM4-access-fpga-by-eim/m-p/751235#M116928</guid>
      <dc:creator>jingyangxie</dc:creator>
      <dc:date>2017-12-28T08:22:57Z</dc:date>
    </item>
  </channel>
</rss>

